Noise-Aware FET Circuit Design Based on C/ID -Invariant A Wahid, J Atkinson, R Bindiganavile, F Jazaeri, A Tajalli
IEEE Transactions on Circuits and Systems II: Express Briefs 70 (7), 2330-2334, 2023
7 2023 Optimal PAM Order for Wireline Communication A Wahid, R Bindiganavile, A Tajalli
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021
6 2021 A 59-fs-rms 35-GHz PLL with FoM of −241-dB in R Bindiganavile, A Wahid, J Atkinson, A Tajalli
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 163-166, 2022
5 2022 Spectrum-efficient communication over copper using hybrid amplitude and spatial signaling R Bindiganavile, A Tajalli
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems …, 2019
4 2019 A Controllable KVCO Ring VCO Topology R Bindiganavile, A Tajalli
2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021
3 2021 Hadamard Multi-Tone Signaling in Multi-Wire Pulse Amplitude Modulation for Next Generation Wireline Communication A Wahid, R Bindiganavile, A Tajalli
2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2024
2024 A 29 GHz Sub-Sampling PLL with 25.6-fs-rms RJ based on a Discrete-Time Integrating PD in 45nm RF SOI R Bindiganavile, A Wahid, A Tajalli
2024 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2024
2024 Hybrid Pulse-Amplitude-Modulation Signaling Scheme and Clock Synthesis for Next Generation Ultra-High-Speed Wire-Line Transmitters RS Bindiganavile
The University of Utah, 2024
2024 Trade-Offs in Design of Low-Jitter and Wideband Phase-Locked Loops A WAHID, A Tajalli, R Bindiganavile
Available at SSRN 4942040, 0
A Controllable K R Bindiganavile
Trade-Offs in Design of Low-Jitter and Wideband Phase-Locked Loops R Bindiganavile, A Wahid, A Tajalli
Available at SSRN 4819329, 0
Armin TajalliUniversity of UtahEmail verificata su utah.edu