Design and analysis of 0.9 and 2.3‐GHz concurrent dual‐band CMOS LNA for mobile communication AA Roobert, DGN Rani International Journal of Circuit Theory and Applications 48 (1), 1-14, 2020 | 22 | 2020 |
A C4. 5 decision tree classifier based floorplanning algorithm for System-on-Chip design J Shanthi, DGN Rani, S Rajaram Microelectronics journal 121, 105361, 2022 | 21 | 2022 |
Design and optimisation of feedforward noise cancelling complementary metal oxide semiconductor LNA for 2.4 GHz WLAN applications A Andrew Roobert, D Gracia Nirmala Rani, S Rajaram IET Circuits, Devices & Systems 13 (6), 908-919, 2019 | 17 | 2019 |
Design of CMOS based LNA for 5G Wireless Applications AA Roobert, DGN Rani, M Divya, S Rajaram Proceedings of the 6th International Conference on Communications and …, 2018 | 16 | 2018 |
Optical grating techniques for MEMS-based spectrometer—A review A Ravindran, D Nirmal, P Prajoon, DGN Rani IEEE Sensors Journal 21 (5), 5645-5655, 2020 | 14 | 2020 |
Vlsi floorplanning relying on differential evolution algorithm DJ Moni, S Arumugam, GN Rani ICGST International Journal on Artificial Intelligence and Machine Learning …, 2007 | 14 | 2007 |
Power approaches for biosensors based bio-medical devices G Gifta, DGN Rani ECS Journal of Solid State Science and Technology 9 (12), 121005, 2020 | 13 | 2020 |
Survey on parameter optimization of mobile communication band low noise amplifier design AA Roobert, DGN Rani International Journal of RF and Microwave Computer‐Aided Engineering 29 (7 …, 2019 | 13 | 2019 |
Design and analysis of a sleep and wake-up CMOS low noise amplifier for 5G applications AA Roobert, DGN Rani Telecommunication Systems 76, 461-470, 2021 | 11 | 2021 |
Thermal aware modern VLSI floorplanning NRD Gracia, S Rajaram, A Sudarsan 2012 International Conference on Devices, Circuits and Systems (ICDCS), 187-190, 2012 | 10 | 2012 |
An Enhanced Memetic Algorithm using SKB tree representation for fixed-outline and temperature driven non-slicing floorplanning J Shanthi, DGN Rani, S Rajaram Integration 86, 84-97, 2022 | 8 | 2022 |
Design and analysis of 28 GHz CMOS low power LNA with 6.4 dB gain variability for 5G applications AA Roobert, PS Arunodhayamary, DGN Rani, M Venkatesh, LJ Julus Transactions on Emerging Telecommunications Technologies 33 (7), e4486, 2022 | 8 | 2022 |
Low power VLSI architecture design of BMC, BPSC and PC schemes DGNR G. Rajakumar, A. Andrew Roobert, T. S. Arun Samuel Analog Integr Circ Sig Process Springer 93 (1), 169-178, 2017 | 8* | 2017 |
Low hardware overhead implementation of 3-weight pattern generation technique for VLSI testing DGN Rani, MGM Meenakshi, SA Marina 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-5, 2014 | 6 | 2014 |
Design and analysis of CMOS low power OTA for biomedical applications DGN Rani, G Gifta, M Meenakshi, C Gomathy, T Gowsalaya 2019 4th International Conference on Recent Trends on Electronics …, 2019 | 5 | 2019 |
A survey on B*–Tree–based evolutionary algorithms for VLSI floorplanning optimisation DGN Rani, S Rajaram International journal of computer applications in technology 48 (4), 281-287, 2013 | 5 | 2013 |
Design of CMOS based biosensor for implantable medical devices G Gifta, D Gracia Nirmala Rani, N Farhana, R Archana International Symposium on VLSI Design and Test, 695-704, 2018 | 4 | 2018 |
A novel differential evolution based optimization algorithm for Non-Sliceable VLSI floorplanning D Gracia Nirmala Rani, S Rajaram Iranian Journal of Science 39 (3.1), 375-382, 2015 | 4 | 2015 |
Design of static random access memory using QCA technology DGN Rani, M Saranya, T Sivashankari, N Meenakshi, R Meena, ... 2016 3rd International Conference on Devices, Circuits and Systems (ICDCS …, 2016 | 3 | 2016 |
Develop a Quantum Based Time Scheduling Algorithm for Digital Microfluidic Biochips N Nirmala, D Gracia Nirmala Rani International Conference on Computing, Communications, and Cyber-Security, 69-78, 2022 | 2 | 2022 |