| RTLCoder: Fully open-source and efficient LLM-assisted RTL code generation technique S Liu, W Fang, Y Lu, J Wang, Q Zhang, H Zhang, Z Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 73* | 2024 |
| Assertllm: Generating and evaluating hardware verification assertions from design specifications via multi-llms W Fang, M Li, M Li, Z Yan, S Liu, Z Xie, H Zhang arXiv preprint arXiv:2402.00386, 2024 | 36 | 2024 |
| Large circuit models: opportunities and challenges L Chen, Y Chen, Z Chu, W Fang, TY Ho, R Huang, Y Huang, S Khan, M Li, ... Science China Information Sciences 67 (10), 200402, 2024 | 34* | 2024 |
| An integrated single-shot spectrometer with large bandwidth-resolution ratio and wide operation temperature range A Li, C Wang, F Bao, W Fang, Y Liang, R Cheng, S Pan PhotoniX 4 (1), 29, 2023 | 34 | 2023 |
| Masterrtl: A pre-synthesis ppa estimation framework for any rtl design W Fang, Y Lu, S Liu, Q Zhang, C Xu, LW Wills, H Zhang, Z Xie 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 18 | 2023 |
| Specllm: Exploring generation and review of vlsi design specification with large language model M Li, W Fang, Q Zhang, Z Xie arXiv preprint arXiv:2401.13266, 2024 | 16 | 2024 |
| Transferable pre-synthesis ppa estimation for rtl designs with data augmentation techniques W Fang, Y Lu, S Liu, Q Zhang, C Xu, LW Wills, H Zhang, Z Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 6 | 2024 |
| Annotating slack directly on your verilog: Fine-grained rtl timing evaluation for early optimization W Fang, S Liu, H Zhang, Z Xie Proceedings of the 61st ACM/IEEE Design Automation Conference, 1-6, 2024 | 4 | 2024 |
| r-map: Relating Implementation and Specification in Hardware Refinement Checking W Fang, G Hu, H Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 3 | 2023 |
| WASIM: A word-level abstract symbolic simulation framework for hardware formal verification W Fang, H Zhang International Conference on Tools and Algorithms for the Construction and …, 2023 | 2 | 2023 |
| A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks W Fang, S Liu, H Zhang, Z Xie | 1 | 2025 |
| OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation S Liu, Y Lu, W Fang, M Li, Z Xie | 1 | 2024 |
| Towards Big Data in AI for EDA Research: Generation of New Pseudo-Circuits at RTL Stage S Liu, W Fang, Y Lu, Q Zhang, Z Xie | | 2025 |
| CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design W Fang, S Liu, J Wang, Z Xie The Thirteenth International Conference on Learning Representations, 0 | | |
Zhiyao XieAssistant Professor, Hong Kong University of Science and Technologyכתובת אימייל מאומתת בדומיין ust.hk