| Test versus security: Past and present J Da Rolt, A Das, G Di Natale, ML Flottes, B Rouzeyre, I Verbauwhede IEEE Transactions on Emerging topics in Computing 2 (1), 50-62, 2014 | 118 | 2014 |
| New security threats against chips containing scan chain structures J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre 2011 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2011 | 87 | 2011 |
| Are advanced DfT structures sufficient for preventing scan-attacks? J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre 2012 IEEE 30th VLSI Test Symposium (VTS), 246-251, 2012 | 85 | 2012 |
| A novel differential scan attack on advanced DFT structures JD Rolt, GD Natale, ML Flottes, B Rouzeyre ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013 | 76 | 2013 |
| Secure JTAG implementation using Schnorr protocol A Das, J Da Rolt, S Ghosh, S Seys, S Dupuis, G Di Natale, ML Flottes, ... Journal of Electronic Testing 29, 193-209, 2013 | 55 | 2013 |
| A new scan attack on rsa in presence of industrial countermeasures J Da Rolt, A Das, G Di Natale, ML Flottes, B Rouzeyre, I Verbauwhede Constructive Side-Channel Analysis and Secure Design: Third International …, 2012 | 42 | 2012 |
| Thwarting scan-based attacks on secure-ICs with on-chip comparison J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre IEEE transactions on very large scale integration (VLSI) systems 22 (4), 947-951, 2013 | 39 | 2013 |
| A smart test controller for scan chains in secure circuits J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 228-229, 2013 | 30 | 2013 |
| A scan-based attack on elliptic curve cryptosystems in presence of industrial design-for-testability structures J Da Rolt, A Das, G Di Natale, ML Flottes, B Rouzeyre, I Verbauwhede 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2012 | 29 | 2012 |
| Adaptive low-power architecture for high-performance and reliable embedded computing RR Ferreira, J Da Rolt, GL Nazar, AF Moreira, L Carro 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems …, 2014 | 8 | 2014 |
| On-chip test comparison for protecting confidential data in secure ICs J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre 2012 17th IEEE European Test Symposium (ETS), 1-1, 2012 | 8 | 2012 |
| Scan attacks on side-channel and fault attack resistant public-key implementations J Da Rolt, A Das, S Ghosh, G Di Natale, ML Flottes, B Rouzeyre, ... Journal of Cryptographic Engineering 2, 207-219, 2012 | 4 | 2012 |
| Permanent fault detection and diagnosis in the lightweight dual modular redundancy architecture RR Ferreira, E Sanchez, J Da Rolt, GL Nazar, AF Moreira, L Carro, ... 2015 16th Latin-American Test Symposium (LATS), 1-6, 2015 | 2 | 2015 |
| Testabilité versus Sécurité: Nouvelles attaques par chaîne de scan & contremesures JJ Da Rolt Montpellier 2, 2012 | 1 | 2012 |
| On-Chip Comparison for Testing Secure ICs J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre DCIS 2012-27th Conference on Design of Circuits and Integrated Systems, 112-117, 2012 | 1 | 2012 |
| CIME-Réseau CNFM-CIME Nanotech E Bychina Evgeniia Bychina, 2024 | | 2024 |
| Reliable execution of statechart-generated correct embedded software under soft errors RR Ferreira, T Klotz, T Vörtler, J da Rolt, GL Nazar, AF Moreira, L Carro, ... 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | | 2014 |
| 2013 JETTA-TTTC Best Paper Award A Das, J Da Rolt, S Ghosh, S Seys, S Dupuis, G Di Natale, BR Flottes, ... J Electron Test 30, 639-640, 2014 | | 2014 |
| New side-channel attack against scan chains J Da Rolt, G Di Natale, ML Flottes, B Rouzeyre 9th CryptArchi Workshop (2011), 2, 2011 | | 2011 |
| Test & Security G Di Natale, ML Flottes, B Rouzeyre | | |
Giorgio Di NataleCNRS - TIMAכתובת אימייל מאומתת בדומיין univ-grenoble-alpes.fr