| Full chip leakage estimation considering power supply and temperature variations H Su, F Liu, A Devgan, E Acar, S Nassif Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 351 | 2003 |
| Block-based static timing analysis with uncertainty A Devgan, C Kashyap ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 322 | 2003 |
| Buffer insertion for noise and delay optimization CJ Alpert, A Devgan, ST Quay Proceedings of the 35th annual Design Automation Conference, 362-367, 1998 | 299 | 1998 |
| Wire segmenting for improved buffer insertion C Alpert, A Devgan Proceedings of the 34th Annual Design Automation Conference, 588-593, 1997 | 294 | 1997 |
| Efficient coupled noise estimation for on-chip interconnects Devgan 1997 Proceedings of IEEE International Conference on Computer Aided Design …, 1997 | 241 | 1997 |
| How to efficiently capture on-chip inductance effects: Introducing a new circuit element K A Devgan, H Ji, W Dai IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000 | 217 | 2000 |
| Method and apparatus for performing buffer insertion with accurate gate and interconnect delay computation CJ Alpert, A Devgan, ST Quay US Patent 6,347,393, 2002 | 202 | 2002 |
| Optimum buffer placement for noise avoidance CJ Alpert, ST Quay, A Devgan US Patent 6,117,182, 2000 | 202 | 2000 |
| Parametric yield estimation considering leakage variability RR Rao, A Devgan, D Blaauw, D Sylvester Proceedings of the 41st Annual Design Automation Conference, 442-447, 2004 | 189 | 2004 |
| RC delay metrics for performance optimization CJ Alpert, A Devgan, CV Kashyap IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 179 | 2001 |
| An efficient algorithm for statistical minimization of total power under timing yield constraints M Mani, A Devgan, M Orshansky Proceedings of the 42nd annual Design Automation Conference, 309-314, 2005 | 176 | 2005 |
| Buffer insertion with accurate gate and interconnect delay computation CJ Alpert, A Devgan, ST Quay Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 479-484, 1999 | 150 | 1999 |
| Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions R Joshi, A Devgan US Patent App. 11/077,313, 2006 | 110 | 2006 |
| A two moment RC delay metric for performance optimization CJ Alpert, A Devgan, C Kashyap Proceedings of the 2000 international symposium on Physical design, 69-74, 2000 | 99 | 2000 |
| Adaptively controlled explicit simulation A Devgan, RA Rohrer IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994 | 97 | 1994 |
| Efficient techniques for gate leakage estimation RM Rao, JL Burns, A Devgan, RB Brown Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 95 | 2003 |
| Row circuit ring oscillator method for evaluating memory cell performance RV Joshi, Q Ye, YH Chan, A Devgan US Patent 7,376,001, 2008 | 87* | 2008 |
| KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect H Ji, A Devgan, W Dai Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 77 | 2001 |
| Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability RV Joshi, Q Ye, A Devgan US Patent 7,301,835, 2007 | 70 | 2007 |
| Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit E Acar, A Devgan, SR Nassif US Patent 7,137,080, 2006 | 69 | 2006 |