| Serial concatenation of interleaved codes: Performance analysis, design, and iterative decoding S Benedetto, D Divsalar, G Montorsi, F Pollara IEEE Transactions on information Theory 44 (3), 909-926, 1998 | 1886 | 1998 |
| Unveiling turbo codes: Some results on parallel concatenated coding schemes S Benedetto, G Montorsi IEEE Transactions on Information theory 42 (2), 409-428, 1996 | 1810 | 1996 |
| A soft-input soft-output APP module for iterative decoding of concatenated codes S Benedetto, D Divsalar, G Montorsi, F Pollara IEEE communications letters 1 (1), 22-24, 1997 | 830 | 1997 |
| Design of parallel concatenated convolutional codes S Benedetto, G Montorsi IEEE Transactions on Communications 44 (5), 591-600, 1996 | 726 | 1996 |
| A soft-input soft-output maximum a posteriori (MAP) module to decode parallel and serial concatenated codes S Benedetto, D Divsalar, G Montorsi, F Pollara TDA progress report 42 (127), 1-20, 1996 | 577 | 1996 |
| Parallel concatenated trellis coded modulation S Benedetto, D Divsalar, G Montorsi, F Pollara Proceedings of ICC/SUPERCOMM'96-International Conference on Communications 2 …, 1996 | 319 | 1996 |
| Soft-output decoding algorithms in iterative decoding of turbo codes S Benedetto, G Montorsi, D Divsalar, F Pollara The Telecommunications and Data Acquisition Report, 1996 | 316 | 1996 |
| Soft‐input soft‐output modules for the construction and distributed iterative decoding of code networks S Benedetto, G Montorsi, D Divsalar, F Pollara European transactions on telecommunications 9 (2), 155-172, 1998 | 309 | 1998 |
| A search for good convolutional codes to be used in the construction of turbo codes S Benedetto, R Garello, G Montorsi IEEE Transactions on Communications 46 (9), 1101-1105, 1998 | 237 | 1998 |
| Serial concatenation of block and convolutional codes S Benedetto, G Montorsi Electronics Letters 32 (10), 887-888, 1996 | 206 | 1996 |
| Iterative decoding of serially concatenated convolutional codes S Benedetto, G Montorsi Electronics letters 32 (13), 1186-1188, 1996 | 195 | 1996 |
| Mapping interleaving laws to parallel turbo and LDPC decoder architectures A Tarable, S Benedetto, G Montorsi IEEE Transactions on Information Theory 50 (9), 2002-2009, 2004 | 192 | 2004 |
| Analysis, design, and iterative decoding of double serially concatenated codes with interleavers S Benedetto, D Divsalar, G Montorsi, F Pollara IEEE Journal on Selected Areas in Communications 16 (2), 231-244, 1998 | 183 | 1998 |
| Design of fixed-point iterative decoders for concatenated codes with interleavers G Montorsi, S Benedetto IEEE Journal on Selected Areas in Communications 19 (5), 871-882, 2001 | 131 | 2001 |
| Bandwidth efficient parallel concatenated coding schemes S Benedetto, D Divsalar, G Montorsi, F Pollara Electronics Letters 31 (24), 2067-2069, 1995 | 129 | 1995 |
| Performance evaluation of trellis-coded modulation schemes S Benedetto, M Mondin, G Montorsi Proceedings of the IEEE 82 (6), 833-855, 1994 | 128 | 1994 |
| Iterative decoding of concatenated convolutional codes: Implementation issues E Boutillon, C Douillard, G Montorsi Proceedings of the IEEE 95 (6), 1201-1227, 2007 | 121 | 2007 |
| Soft-output decoding algorithms for continuous decoding of parallel concatenated convolutional codes S Benedetto, D Divsalar, G Montorsi, F Pollara Proceedings of ICC/SUPERCOMM'96-International Conference on Communications 1 …, 1996 | 111 | 1996 |
| MHOMS: high-speed ACM modem for satellite applications S Benedetto, R Garello, G Montorsi, C Berrou, C Douillard, ... IEEE Wireless Communications 12 (2), 66-77, 2005 | 110 | 2005 |
| Average performance of parallel concatenated block codes S Benedetto, G Montorsi Electronics Letters 31 (3), 156-158, 1995 | 93 | 1995 |
Dariush DivsalarSenior Research Scientist JPL Caltech確認したメール アドレス: jpl.nasa.gov