| Basic reversible logic gates and it’s QCA implementation P Biswas, N Gupta, N Patidar Int. Journal of Engineering Research and Applications 4 (6), 12-16, 2014 | 63 | 2014 |
| Design of one bit arithmetic logic unit (ALU) in QCA N Gupta, S Shrivastava, N Patidar, S Katiyal, KK Choudhary Int. J. Comput. Appl. Eng. Sci 2 (3), 281-5, 2012 | 16 | 2012 |
| Efficient designs of high-speed combinational circuits and optimal solutions using 45-degree cell orientation in QCA nanotechnology A Tiwari, M Patidar, A Jain, N Patidar, N Gupta Materials Today: Proceedings 66, 3465-3473, 2022 | 11 | 2022 |
| Design and Implementation of 16-bit Arithmetic Logic Unit using Quantum dot Cellular Automata (QCA) Technique NP Rashmi Pandey, Namit gupta International Journal of Engineering Research and Applications 4 (9), 10-16, 2014 | 8* | 2014 |
| Design of hybrid adder-subtractor (HAS) using reversible logic gates in QCA N Gupta, N Patidar, S Katiyal, KK Choudhary International Journal of Computer Applications 53 (15), 2012 | 7 | 2012 |
| An extensible architecture of 32-bit ALU for high-speed computing in QCA technology N Patidar, N Gupta The Journal of Supercomputing 78 (18), 19605-19627, 2022 | 6 | 2022 |
| A novel 4-bit arithmetic logic unit implementation in quantum-dot cellular automata N Patidar, N Gupta, A Khabia, S Katiyal, KK Choudhary Education 2013, 2010 | 6 | 2010 |
| An ultra-dense and cost-efficient coplanar RAM cell design in quantum-dot cellular automata technology M Patidar, A Jain, K Patidar, SK Shukla, AH Majeed, N Gupta, N Patidar The Journal of Supercomputing 80 (5), 6989-7027, 2024 | 4 | 2024 |
| Error Detection in 2-bit & 4-bit Multiplier using Parity Predictor Circuit in QCA A Laad, N Gupta, N Patidar International Journal of Computer Applications 131 (15), 27-31, 2015 | 3 | 2015 |
| An Efficient Layout of Single-Layer Full Adder Using QCA N Patidar, N Gupta Soft Computing: Theories and Applications: Proceedings of SoCTA 2019, 165-172, 2020 | 2 | 2020 |
| The Role of Nanoelectronic Devices in a Smart City Ecosystem M Patidar, N Gupta, A Jain, N Patidar AI-Centric Smart City Ecosystems, 85-109, 2022 | 1 | 2022 |
| Year of Publication: 2015 A Laad, N Gupta, N Patidar | | 2015 |
| Comparison Between the Design of Various Logic Gates Using QCA & CMOS Technology SK Namit Gupta, Rashmi Pandey, Nilesh Patidar, K.K. Chaudhary Computing for Sustainable Global Development, INDIACom-2015;, 2.145-152, 2015 | | 2015 |
| Design of 1 - Bit Reversible ALU Using Proposed NN Gate and DKG Gate and its Implementation in Quantum - Dot Cellular Automata SK Namit Gupta, Nilesh Patidar, Amita Khabia, Kamal Choudhary Computing for Sustainable Global Development, INDIACom - 201 4, 219-223, 2014 | | 2014 |
| 8-Bit Arithmetic Logic Unit Implementation in Quantum-dot Cellular Automata (QCA) SK Namit Gupta, Nilesh Patidar, K.K. Choudhary Computing for Sustainable Global Development, IndiaCom-2014, 402-407, 2014 | | 2014 |
| Investigations of Architectural and Functional Aspects of Non Electronic Digital Devices using Quantum Dot Cellular Automata N PATIDAR Indore, 0 | | |
Namit GuptaProfessor of ECE, SVITS,SVVV, Indore (MP)-India確認したメール アドレス: svvv.edu.in
Namit GuptaProfessor of ECE, SVITS,SVVV, Indore (MP)-India確認したメール アドレス: svvv.edu.in