フォロー
Dr. Pratikhya Raut
Dr. Pratikhya Raut
Assistant Professor in dept.of ECE at Siddhartha School of Engineering, SAHE University,Vijayawada
確認したメール アドレス: vrsiddhartha.ac.in
タイトル
引用先
引用先
RF and linearity parameter analysis of junction-less gate all around (JLGAA) MOSFETs and their dependence on gate work function
P Raut, U Nanda
Silicon 14 (10), 5427-5435, 2022
392022
RF with linearity and non-linearity parameter analysis of gate all around negative capacitance junction less FET (GAA-NC-JLFET) for different ferroelectric thickness
P Raut, U Nanda, DK Panda
Physica Scripta 97 (10), 105809, 2022
262022
Recent trends on junction-less field effect transistors in terms of device topology, modeling, and application
P Raut, U Nanda, DK Panda
ECS Journal of Solid State Science and Technology 12 (3), 031010, 2023
222023
A charge-based analytical model for gate all around junction-less field effect transistor including interface traps
P Raut, U Nanda
ECS Journal of Solid State Science and Technology 11 (5), 051006, 2022
192022
Analytical drain current model development of twin gate TFET in subthreshold and super threshold regions
P Raut, U Nanda, DK Panda
Microelectronics Journal 135, 105761, 2023
112023
Performance Analysis of Double Gate Junctionless TFET with respect to different high-k materials and oxide thickness
P Raut, U Nanda, DK Panda, HPT Nguyen
2022 2nd International Conference on Artificial Intelligence and Signal …, 2022
82022
Simulation and modeling of high-sensitive JL-TFET based biosensor for label free detection of biomolecules
P Raut, DK Panda, U Nanda, CC Hsu
Microsystem Technologies, 1-9, 2024
52024
GSE and GWE Techniques to improve ON (ION) current and Ambipolar conduction of Tunnel FET (TFET) device: A Comprehensive review.
NN Reddy, P Raut, DK Panda
Micro and Nanostructures, 207865, 2024
42024
Design and Modeling of a Label-free JLTFETBased Biosensor for Enhanced Sensitivity
P Raut, U Nanda, DK Panda
2023 IEEE Devices for Integrated Circuit (DevIC), 77-81, 2023
32023
Design and Comparison of Wideband Cascode Low Noise Amplifier using GAA-JLFET and GAA-NC-JLFET for RFIC Applications
P Raut, U Nanda, DK Panda, CC Hsu
2023 3rd International conference on Artificial Intelligence and Signal …, 2023
22023
Threshold voltage model development of N+ pocket vertical junctionless TFET (V-JL-TFET) as a label free biosensor
P Raut, DK Panda
Microelectronics Journal 151, 106331, 2024
12024
Analysis of RF with DC and Linearity Parameter and Study of Noise Characteristics of Gate‐All‐Around Junctionless FET (GAA‐JLFET) and Its Applications
P Raut, U Nanda, DK Panda
Nanodevices for Integrated Circuit Design, 93-115, 2023
12023
Performance Analysis of FFT (Fast Fourier Transform) with Respect to Different Multipliers
P Raut, P Yamini, KJ Chowdary, KNS Kumar
2024 4th International Conference on Artificial Intelligence and Signal …, 2024
2024
Speech Mastery Detection Using Advanced Natural Language Processing (NLP) and Automatic Speech Recognition (ASR) Techniques
P Raut, K Anitha, S Sowmya, K Vinnu
2024 4th International Conference on Artificial Intelligence and Signal …, 2024
2024
Low-bandgap Material Engineering based TFET device for Next-Generation Biosensor Application-A Comprehensive review on Device structure and Sensitivity.
NN Reddy, P Raut, DK Panda
Micro and Nanostructures, 207935, 2024
2024
Mastery Detector Through Speech
P Raut, K Anitha, S Sowmya, K Vinnu
2024 OPJU International Technology Conference (OTCON) on Smart Computing for …, 2024
2024
Impact of post metal annealing on gate work function engineering for advanced MOS applications
SS Kumar, A Prasad, A Sinha, P Raut, P Das, SS Mahato, S Mallik
AIP Conference Proceedings 1728 (1), 2016
2016
FETs for Advanced, Ultra-Scaled Technologies
P Raut, U Nanda, DK Panda, S Barraud, B Previtali, V Lapras
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