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David Kohlbrenner
David Kohlbrenner
確認したメール アドレス: cs.washington.edu - ホームページ
タイトル
引用先
引用先
Keystone: An open framework for architecting trusted execution environments
D Lee, D Kohlbrenner, S Shinde, K Asanović, D Song
Proceedings of the Fifteenth European Conference on Computer Systems, 1-16, 2020
659*2020
On subnormal floating point and abnormal timing
M Andrysco, D Kohlbrenner, K Mowery, R Jhala, S Lerner, H Shacham
2015 IEEE Symposium on Security and Privacy, 623-639, 2015
2482015
Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX
C Disselkoen, D Kohlbrenner, L Porter, D Tullsen
26th USENIX Security Symposium (USENIX Security 17), 51-67, 2017
2422017
Hertzbleed: Turning power Side-Channel attacks into remote timing attacks on x86
Y Wang, R Paccagnella, ET He, H Shacham, CW Fletcher, D Kohlbrenner
31st USENIX Security Symposium (USENIX Security 22), 679-697, 2022
1222022
Trusted browsers for uncertain times
D Kohlbrenner, H Shacham
25th USENIX Security Symposium (USENIX Security 16), 463-480, 2016
1052016
Opening pandora’s box: A systematic study of new ways microarchitecture can leak private data
JRS Vicarte, P Shome, N Nayak, C Trippel, A Morrison, D Kohlbrenner, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
542021
Augury: Using data memory-dependent prefetchers to leak data at rest
JRS Vicarte, M Flanders, R Paccagnella, G Garrett-Grossman, A Morrison, ...
2022 IEEE Symposium on Security and Privacy (SP), 1491-1505, 2022
532022
On the effectiveness of mitigations against floating-point timing channels
D Kohlbrenner, H Shacham
26th USENIX Security Symposium (USENIX Security 17), 69-81, 2017
452017
Welcome to the Entropics: Boot-time entropy in embedded devices
K Mowery, M Wei, D Kohlbrenner, H Shacham, S Swanson
2013 IEEE Symposium on Security and Privacy, 589-603, 2013
322013
Verifying RISC-V physical memory protection
K Cheang, C Rasmussen, D Lee, DW Kohlbrenner, K Asanović, ...
arXiv preprint arXiv:2211.02179, 2022
272022
GoFetch: Breaking constant-time cryptographic implementations using data memory-dependent prefetchers
B Chen, Y Wang, P Shome, CW Fletcher, D Kohlbrenner, R Paccagnella, ...
Proc. USENIX Secur. Symp, 1-21, 2024
212024
Synchronization Storage Channels (S2C): Timer-less Cache Side-Channel Attacks on the Apple M1 via Hardware Synchronization Instructions
J Yu, A Dutta, T Jaeger, D Kohlbrenner, CW Fletcher
32nd USENIX Security Symposium (USENIX Security 23), 1973-1990, 2023
172023
Sanctorum: A lightweight security monitor for secure enclaves
I Lebedev, K Hogan, J Drean, D Kohlbrenner, D Lee, K Asanović, D Song, ...
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
172019
DVFS frequently leaks secrets: Hertzbleed attacks beyond SIKE, cryptography, and CPU-only data
Y Wang, R Paccagnella, A Wandke, Z Gang, G Garrett-Grossman, ...
2023 IEEE Symposium on Security and Privacy (SP), 2306-2320, 2023
162023
Building open trusted execution environments
D Kohlbrenner, S Shinde, D Lee, K Asanovic, D Song
IEEE Security & Privacy 18 (5), 47-56, 2020
112020
GPU. zip: On the Side-Channel Implications of Hardware-Based Graphical Data Compression
Y Wang, R Paccagnella, Z Gang, WR Vasquez, D Kohlbrenner, ...
IEEE SP, 2024
82024
Keystone: Open-source secure hardware enclave
D Lee, D Kohlbrenner, S Shinde, K Asanovic, D Song, I Lebedev, ...
72018
Avoiding instruction-centric microarchitectural timing channels via binary-code transformations
M Flanders, RK Sharma, AE Michael, D Grossman, D Kohlbrenner
Proceedings of the 29th ACM International Conference on Architectural …, 2024
52024
Software-based off-chip memory protection for risc-v trusted execution environments
G Andrade, D Lee, D Kohlbrenner, K Asanovic, D Song
Proc. of the Third Workshop on Computer Architecture Research with RISC-V …, 2020
52020
Humans and Vulnerability During Times of Change: Computer Security Needs, Practices, Challenges, and Opportunities
L Simko
University of Washington, 2022
42022
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