| Design and synthesis of self-checking VLSI circuits NK Jha, SJ Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 267 | 2002 |
| Low power parallel multiplier with column bypassing MC Wen, SJ Wang, YN Lin 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 1638-1641, 2005 | 192 | 2005 |
| Algorithm-based fault tolerance for FFT networks SJ Wang, NK Jha IEEE Transactions on Computers 43 (7), 849-854, 1994 | 152 | 1994 |
| National Chung Hsing University CC Chen Taiwan, 1992 | 95* | 1992 |
| Test and diagnosis of faulty logic blocks in FPGAs SJ Wang, TM Tsai IEE Proceedings-Computers and Digital Techniques 146 (2), 100-106, 1999 | 69 | 1999 |
| Machine learning-based detection method for wafer test induced defects KCC Cheng, LLY Chen, JW Li, KSM Li, NCY Tsai, SJ Wang, AYA Huang, ... IEEE Transactions on Semiconductor Manufacturing 34 (2), 161-167, 2021 | 46 | 2021 |
| Scan-chain partition for high test-data compressibility and low shift power under routing constraint SJ Wang, KSM Li, SC Chen, HY Shiu, YL Chu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 43 | 2009 |
| Testing and diagnosis of interconnect structures in FPGAs SJ Wang, CN Huang Proceedings Seventh Asian Test Symposium (ATS'98)(Cat. No. 98TB100259), 283-287, 1998 | 41 | 1998 |
| FSM-based programmable memory BIST with macro command PC Tsai, SJ Wang, FM Chang 2005 IEEE International Workshop on Memory Technology, Design, and Testing …, 2005 | 38 | 2005 |
| Adversarial attack against modeling attack on PUFs SJ Wang, YS Chen, KSM Li Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 33 | 2019 |
| A reseeding technique for LFSR-based BIST applications NC Lai, SJ Wang Proceedings of the 11th Asian Test Symposium, 2002.(ATS'02)., 200-205, 2002 | 32 | 2002 |
| Reliability enhancement by time and space redundancy in multistage interconnection networks VP Kumar, SJ Wang IEEE transactions on reliability 40 (4), 461-473, 1991 | 29 | 1991 |
| Low-power BIST with a smoother and scan-chain reorder under optimal cluster size NC Lai, SJ Wang, YH Fu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 26 | 2006 |
| State assignment of finite state machines for low power applications SJ Wang, MD Horng Electronics Letters 32 (25), 2323-2324, 1996 | 25 | 1996 |
| Wafer defect pattern labeling and recognition using semi-supervised learning KSM Li, XH Jiang, LLY Chen, SJ Wang, AYA Huang, JE Chen, HC Liang, ... IEEE Transactions on Semiconductor Manufacturing 35 (2), 291-299, 2022 | 24 | 2022 |
| Modeling attack resistant PUFs based on adversarial attack against machine learning SJ Wang, YS Chen, KSM Li IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021 | 24 | 2021 |
| Congestion-and timing-driven droplet routing for pin-constrained paper-based microfluidic biochips SJ Wang, KSM Li, TY Ho 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 593-598, 2016 | 22 | 2016 |
| Generating efficient tests for continuous scan SJ Wang, SN Chiou Proceedings of the 38th annual Design Automation Conference, 162-165, 2001 | 22 | 2001 |
| Study of a new tumor marker, CYFRA 21-1, in squamous cell carcinoma of the cervix, and comparison with squamous cell carcinoma antigen. SC Tsai, CH Kao, SJ Wang Neoplasma 43 (1), 27-29, 1996 | 22 | 1996 |
| Low capture power test generation for launch-off-capture transition test based on don't-care filling SJ Wang, YT Chen, KSM Li 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 3683-3686, 2007 | 20 | 2007 |
