フォロー
Siyuan Xu
Siyuan Xu
Huawei Noah's Ark Lab
確認したメール アドレス: huawei.com
タイトル
引用先
引用先
Exposing approximate computing optimizations at different levels: From behavioral to gate-level
S Xu, BC Schafer
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (11 …, 2017
692017
Migration-based elastic consolidation scheduling in cloud data center
Q Huang, S Su, S Xu, J Li, P Xu, K Shuang
2013 IEEE 33rd International Conference on Distributed Computing Systems …, 2013
302013
Toward self-tunable approximate computing
S Xu, BC Schafer
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 778-789, 2018
242018
Approximate reconfigurable hardware accelerator: Adapting the micro-architecture to dynamic workloads
S Xu, BC Schafer
2017 IEEE International Conference on Computer Design (ICCD), 113-120, 2017
222017
Llm4eda: Emerging progress in large language models for electronic design automation
R Zhong, X Du, S Kai, Z Tang, S Xu, HL Zhen, J Hao, Q Xu, M Yuan, J Yan
arXiv preprint arXiv:2401.12224, 2023
182023
Reinforcement Learning within Tree Search for Fast Macro Placement
Z Geng, J Wang, Z Liu, S Xu, Z Tang, M Yuan, HAO Jianye, Y Zhang, ...
Forty-first International Conference on Machine Learning, 2024
92024
Approximating behavioral HW accelerators through selective partial extractions onto synthesizable predictive models
S Xu, BC Schafer
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
82019
Hardware-assisted simulation of voltage-behind-reactance models of electric machines on fpga
AP Yadav, S Xu, BC Schafer, A Davoudi
IEEE Transactions on Energy Conversion 35 (3), 1247-1257, 2020
72020
Benchmarking end-to-end performance of ai-based chip placement algorithms
Z Wang, Z Geng, Z Tu, J Wang, Y Qian, Z Xu, Z Liu, S Xu, Z Tang, S Kai, ...
arXiv preprint arXiv:2407.15026, 2024
62024
On the design of high performance hw accelerator through high-level synthesis scheduling approximations
S Xu, BC Schafer
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
62020
Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators
S Xu, S Liu, Y Liu, A Mahapatra, M Villaverde, F Moreno, BC Schafer
Microprocessors and Microsystems 65, 169-179, 2019
62019
Hw/sw co-design experimental framework using configurable socs
S Xu, J Chen, BC Schafer
2017 International Conference on ReConFigurable Computing and FPGAs …, 2017
52017
Deep: Dedicated energy-efficient approximation for dynamically reconfigurable architectures
S Xu, BC Schafer
2018 IEEE 36th International Conference on Computer Design (ICCD), 587-594, 2018
42018
Routeplacer: An end-to-end routability-aware placer with graph neural network
Y Hou, H Ye, Y Zhang, S Xu, G Song
Proceedings of the 30th ACM SIGKDD Conference on Knowledge Discovery and …, 2024
22024
Escaping Local Optima in Global Placement
K Xue, X Lin, Y Shi, S Kai, S Xu, C Qian
arXiv preprint arXiv:2402.18311, 2024
22024
Ranktuner: When design tool parameter tuning meets preference bayesian optimization
P Xu, S Zheng, Y Ye, C Bai, S Xu, H Geng, TY Ho, B Yu
IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE, 1-7, 2024
12024
Low Power Design of Runtime Reconfigurable FPGAs through Contexts Approximations
S Xu, BC Schafer
2019 IEEE 37th International Conference on Computer Design (ICCD), 524-531, 2019
12019
Autonomous temperature management through selective control of exact-approximate tiles
S Xu, BC Schafer
2018 IEEE 36th International Conference on Computer Design (ICCD), 346-349, 2018
12018
Configurable soc in-situ hardware/software co-design design space exploration
S Xu, BC Schafer, Y Liu
2017 IEEE International Conference on Computer Design (ICCD), 509-512, 2017
12017
TransPlace: Transferable Circuit Global Placement via Graph Neural Network
Y Hou, H Ye, Y Zhang, S Xu, G Song
arXiv preprint arXiv:2501.05667, 2025
2025
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