| Is register transfer level locking secure? C Karfa, R Chouksey, C Pilato, S Garg, R Karri 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 550-555, 2020 | 29 | 2020 |
| Verification of scheduling of conditional behaviors in high-level synthesis R Chouksey, C Karfa IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (7 …, 2020 | 23 | 2020 |
| Translation validation of code motion transformations involving loops R Chouksey, C Karfa, P Bhaduri IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 15 | 2018 |
| Translation validation of loop invariant code optimizations involving false computations R Chouksey, C Karfa, P Bhaduri VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee …, 2017 | 11 | 2017 |
| HOST: HLS obfuscations against SMT attack C Karfa, TMA Khader, Y Nigam, R Chouksey, R Karri 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 32-37, 2021 | 9 | 2021 |
| Sat based partial attack on compound logic locking M John, A Hoda, R Chouksey, C Karfa 2020 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-6, 2020 | 8 | 2020 |
| Is register transfer level locking secure? in 2020 Design, Automation & Test in Europe Conference Exhibition (DATE)(2020) C Karfa, R Chouksey, C Pilato, S Garg, R Karri | 5 | 2020 |
| Formal verification of optimizing transformations during high-level synthesis R Chouksey, C Karfa, P Bhaduri Proceedings of the 12th Innovations in Software Engineering Conference …, 2019 | 4 | 2019 |
| Counter‐example generation procedure for path‐based equivalence checkers R Chouksey, C Karfa, K Banerjee, PK Kalita, P Bhaduri IET Software 13 (4), 280-285, 2019 | 3 | 2019 |
| Improving performance of a path-based equivalence checker using counter-examples R Chouksey, C Karfa, P Bhaduri 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 2 | 2019 |
| Poster: Automatic detection of inverse operations while avoiding loop unrolling K Banerjee, R Chouksey, C Karfa, PK Kalita Proceedings of the 40th International Conference on Software Engineering …, 2018 | 2 | 2018 |
| ECDLP based proxy multi-signature scheme R Chouksey, R Sivashankari, P Singhai Advances in Computing and Information Technology: Proceedings of the Second …, 2012 | 1 | 2012 |
| VP_TT: A value propagation based equivalence checker for testability transformations R Chouksey, SK Maddheshiya, C Karfa IET Software 15 (1), 147-159, 2021 | | 2021 |
| Automatic Inverse Operation Detection and its Impact in High-level Synthesis PK Kalita, R Chouksey, C Karfa 2020 24th International Symposium on VLSI Design and Test (VDAT), 1-4, 2020 | | 2020 |
| Formal Verification of Access Control Policies. R Chouksey, R Sivashankari International Journal of Advanced Research in Computer Science 2 (3), 2011 | | 2011 |
| Is Register Transfer Level Locking Secure? R Team, C Karfa, R Chouksey, B Team, C Pilato, S Garg, R Karri | | |
Chandan KarfaIndian Institute of Technology Guwahati確認したメール アドレス: iitg.ernet.in