Bibhash Sen

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Biplab Kumar SikdarIndian Institute of Engineering Science and Technology確認したメールアドレス: cs.iiests.ac.in
Dr. Mrinal GoswamiAssociate Professor, Assam down town University, Guwahati, India確認したメールアドレス: adtu.in
Dr. Mahabub Hasan MahalatAssistant Professor, CSIT, Siksha 'O' Anusandhan (Deemed to be University)確認したメールアドレス: soa.ac.in
Anindan MondalAsansol Engg College確認したメールアドレス: phd.nitdgp.ac.in
Jayanta Pal, Ph.D.Assistant Professor, Department of Information Technology, Tripura University確認したメールアドレス: tripurauniv.ac.in
Rijoy MukherjeeResearch scholar at CSE dept, IIT Kharagpur確認したメールアドレス: iitkgp.ac.in
Amit Pramanik確認したメールアドレス: hometriangle.com
Suchismita RoyProfessor, CSE Department, NIT Durgapur確認したメールアドレス: cse.nitdgp.ac.in
Rajdeep Kumar NathResearch Scientist at VTT Technical Research Centre of Finland確認したメールアドレス: vtt.fi
Subodh WairyaProfessor EC Deptt Institute of Engineering & Technology, Lucknow確認したメールアドレス: ietlucknow.ac.in
Mamata DaluiAssistant Professor, Dept. of CSE, NIT Durgapur確認したメールアドレス: cse.nitdgp.ac.in
Neeraj Kumar MisraPh.D Under TEQIP-II, PGD (AI & ML from NIT Warangal), SMIEEE, Associate Professor VIT-AP University確認したメールアドレス: vitap.ac.in
Apu Kumar SahaProfessor, National Institute of Technology Agartala, India確認したメールアドレス: nita.ac.in
Pritam ChouguleSchool of Nanoscience and Technology, Shivaji university, Kolhapur.確認したメールアドレス: beingreen.in
Sourav RoyNational Institute of Technology, Durgapur確認したメールアドレス: phd.nitdgp.ac.in
Dipnarayan DasPhD Scholar (CSE), Indian Institute of Technology (Indian School of Mines)確認したメールアドレス: iitism.ac.in
Suraj MandalPhD Scholar, IIT Kanpur確認したメールアドレス: iitk.ac.in
Samik SomePh.D., Computer Science & Engineering, Indian Institute of Technology Kanpur確認したメールアドレス: iitk.ac.in
Anshu S AnandIndian Institute of Information Technology Allahabad確認したメールアドレス: iitb.ac.in
Shiv Bhushan TripathiPhD Scholar, CSE, IIT Kanpur確認したメールアドレス: cse.iitk.ac.in

フォロー

Bibhash Sen

その他の名前Dr. Bibhash Sen

Associate Professor of CSE Department, NIT Durgapur, WB-713209, India

確認したメールアドレス: cse.nitdgp.ac.in - ホームページ

Hardware Security Quantum-dot Cellular Automata Reversible Logic Fault Tolerant Architecture


タイトル引用回数順公開年順タイトル順	引用先引用先	年
Modular design of testable reversible ALU by QCA multiplexer with increase in programmability B Sen, M Dutta, M Goswami, BK Sikdar Microelectronics Journal 45 (11), 1522-1532, 2014	179	2014
Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers B Sen, M Goswami, S Mazumdar, BK Sikdar Computers & Electrical Engineering 45, 42-54, 2015	97	2015
Design of efficient full adder in quantum‐dot cellular automata B Sen, A Rajoria, BK Sikdar The Scientific World Journal 2013 (1), 250802, 2013	89	2013
An efficient clocking scheme for quantum-dot cellular automata M Goswami, A Mondal, MH Mahalat, B Sen, BK Sikdar International Journal of Electronics Letters 8 (1), 83-96, 2020	71	2020
Realizing reversible computing in QCA framework resulting in efficient design of testable ALU B Sen, M Dutta, S Some, BK Sikdar ACM Journal on Emerging Technologies in Computing Systems (JETC) 11 (3), 1-22, 2014	70	2014
Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing B Sen, M Dutta, BK Sikdar Microelectronics Journal 45 (2), 239-248, 2014	65	2014
On the reliability of majority logic structure in quantum-dot cellular automata B Sen, Y Sahu, R Mukherjee, RK Nath, BK Sikdar Microelectronics Journal 47, 7-18, 2016	60	2016
Design of testable adder in quantum‐dot cellular automata with fault secure logic M Goswami, B Sen, R Mukherjee, BK Sikdar Microelectronics Journal 60, 1-12, 2017	52	2017
Towards the hierarchical design of multilayer QCA logic circuit B Sen, A Nag, A De, BK Sikdar Journal of Computational Science 11, 233-244, 2015	52	2015
A PUF based light weight protocol for secure WiFi authentication of IoT devices MH Mahalat, S Saha, A Mondal, B Sen 2018 8th International symposium on embedded computing and system design …, 2018	49	2018
Towards the design of hybrid QCA tiles targeting high fault tolerance B Sen, M Dutta, R Mukherjee, RK Nath, AP Sinha, BK Sikdar Journal of Computational Electronics 15 (2), 429-445, 2016	47	2016
Fault tolerant QCA logic design with coupled majority-minority gate M Dalui, B Sen, BK Sikdar Int. J. Comput. Appl 1 (29), 81-87, 2010	47	2010
An efficient multiplexer in quantum-dot cellular automata B Sen, M Dutta, D Saran, BK Sikdar Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012 …, 2012	43	2012
Characterization of universal NAND-NOR-inverter QCA gate B Sen, BK Sikdar Proceedings of 11th IEEE VLSI Design and Test Symposium, 433-442, 2007	42	2007
Design of conservative, reversible sequential logic for cost efficient emerging nano circuits with enhanced testability NK Misra, S Wairya, B Sen Ain Shams Engineering Journal 9 (4), 2027-2037, 2018	41	2018
Synthesis of reversible universal logic around QCA with online testability B Sen, D Saran, M Saha, BK Sikdar 2011 International Symposium on Electronic System Design, 236-241, 2011	35	2011
Realization of processing In-memory computing architecture using quantum dot cellular automata PP Chougule, B Sen, TD Dongale Microprocessors and Microsystems 52, 49-58, 2017	31	2017
Optimal synthesis of QCA logic circuit eliminating wire‐crossings RK Nath, B Sen, BK Sikdar IET Circuits, Devices & Systems 11 (3), 201-208, 2017	29	2017
QCA multiplexer based design of reversible ALU B Sen, M Dutta, DK Singh, D Saran, BK Sikdar 2012 IEEE International Conference on Circuits and Systems (ICCAS), 168-173, 2012	29	2012
Towards designing efficient reversible binary code converters and a dual-rail checker for emerging nanocircuits NK Misra, B Sen, S Wairya Journal of Computational Electronics 16 (2), 442-458, 2017	28	2017

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