| Low power radiation aware transistor level design using tri‐state inverter embedded non‐clock gating technique RS Kamalakannan, K Venkatachalam IET Circuits, Devices & Systems 13 (7), 1063-1070, 2019 | 2 | 2019 |
| An Enhanced LPRAFF with Tri-State Inverter Embedded Non-Clock Gating via the CT-GWO Algorithm RS Kamalakannan, R Senthilkumar, K Venkatachalam, K Tamilarasi IETE Journal of Research, 1-12, 2024 | | 2024 |
| Pearson Hashing B-Tree With Self Adaptive Random Key Elgamal Cryptography For Secured Data Storage And Communication In Cloud R Senthilkumar, S Gokulraj, RS Kamalakannan, K Narayanan Webology 18 (5), 4481-4497, 2021 | | 2021 |
| AN ANALYSIS OF VLSI DESIGN BASED ON EFFICIENT MULTIPLIER ARCHITECTURE M Srinivasan, RS Kamalakannan International Journal of Information Technology & Computer Sciences …, 2013 | | 2013 |
| Smartsignverifier: Improved BP Neural Network Based Signature Verification K Tamilarasi, S Rajagopal, RS Kamalakannan, S Sujanthi Available at SSRN 4414747, 0 | | |
| Investigation of low power radiation aware transistor level design in cmos circuits RS Kamalakannan Chennai, 0 | | |