| Effect of gate engineering in double-gate MOSFETs for analog/RF applications A Sarkar, A Kumar Das, S De, C Kumar Sarkar Microelectronics Journal,Impact factor:0.91 43 (11), 873-882, 2012 | 200 | 2012 |
| Implementation of subthreshold adiabatic logic for ultralow-power application M Chanda, S Jain, S De, CK Sarkar IEEE Transactions on very large scale integration (VLSI) systems 23 (12 …, 2015 | 65 | 2015 |
| Technology computer aided design C Sarkar CRC Press, 2018 | 56 | 2018 |
| Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model A Sarkar, S De, A Dey, CK Sarkar Journal of Computational Electronics,Impact factor:1.02 11 (2), 182-195, 2012 | 54 | 2012 |
| Nanotechnology: synthesis to applications S Roy, CK Ghosh, CK Sarkar CRC Press, 2017 | 39 | 2017 |
| Low power VLSI design: fundamentals A Sarkar, S De, M Chanda, CK Sarkar Walter de Gruyter GmbH & Co KG, 2016 | 32 | 2016 |
| 1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model A Sarkar, S De, A Dey, CK Sarkar IET circuits, devices & systems,Impact factor:1.01 6 (1), 28-34, 2012 | 28 | 2012 |
| Modeling of characteristic parameters for nano-scale junctionless double gate MOSFET considering quantum mechanical effect M Chanda, S De, CK Sarkar Journal of Computational Electronics 14, 262-269, 2015 | 27 | 2015 |
| A new analytical subthreshold model of SRG MOSFET with analogue performance investigation A Sarkar, S De, A Dey, CK Sarkar International Journal of Electronics,Impact factor:0.51 99 (2), 267-283, 2012 | 27 | 2012 |
| Novel charge plasma based dielectric modulated impact ionization MOSFET as a biosensor for label-free detection M Chanda, P Dey, S De, CK Sarkar Superlattices and Microstructures 86, 446-455, 2015 | 22 | 2015 |
| Asymmetric halo and symmetric Single‐Halo Dual‐Material Gate and Double‐Halo Dual‐Material Gate n‐MOSFETs characteristic parameter modeling A Sarkar, S De, CK Sarkar International Journal of Numerical Modelling: Electronic Networks, Devices …, 2013 | 17 | 2013 |
| Asymmetric halo and symmetric SHDMG & DHDMGn‐MOSFETs characteristic parameter modeling A Sarkar, S De, CK Sarkar IJNM 26 (1), 41-55, 2013 | 12 | 2013 |
| VLSI design and EDA tools A Sarkar, S De, CK Sarkar Scitech, 2011 | 12 | 2011 |
| Modelling of characteristic parameters for asymmetric DHDMG MOSFET S De, A Sarkar, CK Sarkar WSEAS Transactions on Circuits and Systems 11, 371-380, 2012 | 9 | 2012 |
| Fringing Capacitance based surface potential model for pocket DMG n-MOSFETs S De, A Sarkar, CK Sarkar Journal of Electron Devices 12, 704-712, 2012 | 9 | 2012 |
| Modelling of parameters for asymmetric halo and symmetric DHDMG n-MOSFETs S De, A Sarkar, CK Sarkar International Journal of Electronics,Impact factor:0.51 98 (10), 1365-1381, 2011 | 9 | 2011 |
| Effect of fringing field in modeling of subthreshold surface potential in Dual Material Gate (DMG) MOSFETS S De, A Sarkar, N Mohankumar, CK Sarkar 2008 International Conference on Electrical and Computer Engineering, 148-151, 2008 | 8 | 2008 |
| Swapnadip De, Chandan Kumar Sarkar, Novel charge plasma-based dielectric modulated impact ionization MOSFET as a biosensor for label-free detection M Chanda, P Dey Superlattices and Microstructures 86, 446-455, 2015 | 5 | 2015 |
| Parameter modeling of linearly doped double gate MOSFET with high-k dielectrics S Das, A Choudhury, S Ghosh, S Sarkar, M Chanda, S De 2017 Devices for Integrated Circuit (DevIC), 136-140, 2017 | 4 | 2017 |
| Modeling of Subthreshold Surface Potential for Short Channel Double Gate Dual Material Double Halo MOSFET. D Das, S De, M Chanda, C Kumar Sarkar IUP Journal of Electrical & Electronics Engineering 7 (4), 2014 | 4 | 2014 |
Angsuman SarkarProfessor, Electronics & Communication Engg. Department, Kalyani Govt. Engg. College確認したメール アドレス: ieee.org