Accurate operation delay prediction for FPGA HLS using graph neural networks E Ustun, C Deng, D Pal, Z Li, Z Zhang Proceedings of the 39th international conference on computer-aided design, 1-9, 2020 | 95 | 2020 |
Predictable accelerator design with time-sensitive affine types R Nigam, S Atapattu, S Thomas, Z Li, T Bauer, Y Ye, A Koti, A Sampson, ... Proceedings of the 41st ACM SIGPLAN Conference on Programming Language …, 2020 | 86 | 2020 |
A compiler infrastructure for accelerator generators R Nigam, S Thomas, Z Li, A Sampson Proceedings of the 26th ACM International Conference on Architectural …, 2021 | 79 | 2021 |
Simultaneous area and latency optimization for stochastic circuits by D flip-flop insertion Z Li, Z Chen, Y Zhang, Z Huang, W Qian IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 21 | 2018 |
A high-accuracy approximate adder with correct sign calculation J Hu, Z Li, M Yang, Z Huang, W Qian Integration 65, 370-388, 2019 | 15 | 2019 |
Optimizing JPEG quantization for classification networks Z Li, C De Sa, A Sampson arXiv preprint arXiv:2003.02874, 2020 | 14 | 2020 |
Compiler-driven simulation of reconfigurable hardware accelerators Z Li, Y Ye, S Neuendorffer, A Sampson 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 8 | 2022 |
A Compiler Infrastructure for Accelerator Generators Extended Abstract R Nigam, S Thomas, Z Li, A Sampson | | |