| Method and system for decoding low density parity check codes E Biscondi, D Hoyle, TD Wolf US Patent 8,392,789, 2013 | 131 | 2013 |
| Implementing OpenMP on a high performance embedded multicore MPSoC B Chapman, L Huang, E Biscondi, E Stotzer, A Shrivastava, A Gatherer 2009 IEEE International Symposium on Parallel & Distributed Processing, 1-8, 2009 | 85 | 2009 |
| Vector SIMD VLIW data path architecture TD Anderson, DQ Bui, M Rahman, JRM Zbiciak, E Biscondi, P Dent, ... US Patent 10,628,156, 2020 | 39 | 2020 |
| Local memories with permutation functionality for digital signal processors E Biscondi, DJ Hoyle, TD Wolf US Patent 8,151,031, 2012 | 33 | 2012 |
| Wireless communication system with processor requested RAKE finger tasks P Bertrand, S Sriram, F Honore, E Biscondi US Patent 7,027,492, 2006 | 13 | 2006 |
| A 1.5 Ghz VLIW DSP CPU with integrated floating point and fixed point instructions in 40 nm CMOS T Anderson, D Bui, S Moharil, S Narnur, M Rahman, A Lell, E Biscondi, ... 2011 IEEE 20th Symposium on Computer Arithmetic, 82-86, 2011 | 12 | 2011 |
| Maximizing multicore efficiency with navigator runtime E Biscondi, T Flanagan, F Fruth, Z Lin, F Moerman White Paper, feb, 2012 | 11 | 2012 |
| Low density parity check code row update instruction E Biscondi, DJ Hoyle, TD Wolf US Patent App. 12/347,731, 2010 | 7 | 2010 |
| Sign Operation Instructions and Circuitry TD Wolf, E Biscondi, DJ Hoyle US Patent App. 11/930,958, 2009 | 6 | 2009 |
| Wireless communication system operating in response in part to time signals from the global position satellite system P Bertrand, S Sriram, E Biscondi, F Honore US Patent 7,218,669, 2007 | 5 | 2007 |
| Method and apparatus for coding relating to a forward loop PR Dent, E Biscondi, D Hoyle US Patent App. 12/496,538, 2010 | 4 | 2010 |
| Multicore DSP programming models [In the spotlight] A Gatherer, E Biscondi IEEE Signal Processing Magazine 26 (6), 224, 220-222, 2009 | 4 | 2009 |
| TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance D Bell, E Biscondi Application Report SPRA614A, 2000 | 4 | 2000 |
| Register-based complex number processing E Biscondi, M Eyole US Patent App. 16/630,614, 2021 | 2 | 2021 |
| Dual register data path architecture with registers in a data file divided into groups and sub-groups TD Anderson, DQ Bui, E Biscondi, SD Moharil, M Rahman, S Narnur, ... US Patent 8,880,855, 2014 | 2 | 2014 |
| Method and apparatus for improving trellis decoding PR Dent, E Biscondi, D Hoyle US Patent App. 12/496,527, 2010 | 2 | 2010 |
| Programmable DSPs for 3G Base Station Modems D Hocevar, P Bertrand, E Biscondi, A Gatherer, F Honore, A Laine, ... The Application of Programmable DSPs in Mobile Communications, 41, 2002 | 1 | 2002 |
| Apparatus for forwarding a mediated request to processing circuitry in response to a configuration request A Romana, MT Rodriguez, E Biscondi US Patent 11,113,091, 2021 | | 2021 |
| Message passing in a data processing system RG Dimond, E Biscondi, MT Rodriguez, PS Hughes US Patent 11,106,513, 2021 | | 2021 |
| Cache stashing in a data processing system RG Dimond, E Biscondi, PS Hughes, MT Rodriguez US Patent 10,877,891, 2020 | | 2020 |