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Dr Padma Challa
Dr Padma Challa
Sri Venkateswara College of EngineeringTirupathi
svcolleges.edu.in의 이메일 확인됨
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Design of FFT processor using low power Vedic multiplier for wireless communication
C Padma, P Jagadamba, PR Reddy
Computers & Electrical Engineering 92, 107178, 2021
112021
FIR Filter design using Urdhva Triyagbhyam based on Truncated Wallace and Dadda Multiplier as Basic Multiplication Unit
K Neelima, C Padma, C Nalini, M Balaji
2023 IEEE 12th International Conference on Communication Systems and Network …, 2023
82023
Smart Traffic Control System for Emergency Vehicle Clearance
CP D. Aswani
International Journal and Magazine of Engineering Technology Management and …, 2016
62016
Post-Pandemic Biometric Challenges and Solutions: A Shocker to Supply Chain
K Neelima, B Madhavi, C Padma, BK Pandey, G Gowwrii, SS Manaktala
AI and Machine Learning Impacts in Intelligent Supply Chain, 196-208, 2024
42024
Implementation of High Performance FFT Architecture for DSP Applications
 C.Padma, P.Jagadamba, P. Ramana Reddy
International journal of Advanced Science and Technology (IJAST) 29 (No.3 …, 2020
4*2020
Efficient Cached 64 Point FFT Processor Using Floating Point Arithmetic for OFDM Application
C Padma, P Jagadamba, RR Patil
Instrumentation, Mesure, Metrologie 21 (1), 21, 2022
32022
A Review on Optimized FFT Architectures for Wireless Communication System
 C.Padma, P.Jagadamba, P. Ramana Reddy
Journal of Advanced Research and Dynamical and Control Systems 10 (14), 1654 …, 2018
32018
Smart Agriculture Seeding and Fertilizer Spray Robot using IoT
B KUMAR, C PADMA
22017
A Novel Approach for Design & Implementation of Traffic Light Controller System Using FPGA
C Padma, C Pallavi
International Journal for Innovative Engineering & Management Research 7 (12), 2018
12018
Post-Pandemic Economy–Shocks, Risks and Suggestive Measures
K Neelima, CH Kavya, C Padma, T Suguna
Economic Uncertainty in the Post-Pandemic Era, 187-197, 2024
2024
Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits
CH Pallavi, C Padma, RK Kumar, T Suguna, C Nalini
arXiv preprint arXiv:2410.15736, 2024
2024
Improved Domino Logic based Low Power CMOS Schmitt Trigger Circuit at Nano Scale Regime
P Challa, C Nalini, S Tangimi, N Koppala
Journal of Advanced Research in Applied Sciences and Engineering Technology …, 2024
2024
Efficient Approximate Adders for Image Processing Applications
C Padma, SB Potladurty, C Nalini, T Suguna, CH Pallavi
2024 International Conference on Advances in Computing Research on Science …, 2024
2024
High Speed Single Precision 64-Tap FIR Filter Using Urdhva Tiryagbhyam Sutra
K Neelima, M Sandhiya, C Padma, SJ Ali, KR Meruva
2024 IEEE Students Conference on Engineering and Systems (SCES), 1-5, 2024
2024
Hybrid Cryptography and Steganography-Based Security System for IoT Networks
T Suguna, C Padma, MJ Rani, GP Priya
International journal on recent innovation trends in computing and …, 2023
2023
A Novel Approach for the Analysis on Classification of ILDs Using HRCT Images
K Praveena, C Nalini, C Padma
International Conference on Intelligent Healthcare and Computational Neural …, 2022
2022
Energy Efficient Floating Point Fft/Ifft Processor For Mimo-Ofdm Applications
C Padma
Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12 (10 …, 2021
2021
Low Power and Area Efficient FFT Processor using Radix-24 Feed Forward Multipath Delay Commutator for Wireless Communication
C Padma
Journal on Wireless Communication Networks 8 (3), 10-17, 2019
2019
Pipelined FFT Architectures for wireless Communication Applications
 C.Padma, P.Jagadamba, P. Ramana Reddy
International Journal of Management, Technology and Engineering (IJMTE) 8 …, 2018
2018
Smart Agriculture Seeding and Fertilizer Spray Robot using IOT
CP AKASAM GURUBABU
International Journal of Scientific Engineering and Technology Research …, 2017
2017
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학술자료 1–20