| Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec WY Choi, BG Park, JD Lee, TJK Liu IEEE Electron Device Letters 28 (8), 743-745, 2007 | 2115 | 2007 |
| Three-dimensional NAND flash architecture design based on single-crystalline stacked array Y Kim, JG Yun, SH Park, W Kim, JY Seo, M Kang, KC Ryoo, JH Oh, ... IEEE Transactions on Electron Devices 59 (1), 35-45, 2011 | 348 | 2011 |
| Demonstration of L-shaped tunnel field-effect transistors SW Kim, JH Kim, TJK Liu, WY Choi, BG Park IEEE transactions on electron devices 63 (4), 1774-1778, 2015 | 317 | 2015 |
| Single-crystalline Si stacked array (STAR) NAND flash memory JG Yun, G Kim, JE Lee, Y Kim, WB Shim, JH Lee, H Shin, JD Lee, ... IEEE Transactions on Electron Devices 58 (4), 1006-1014, 2011 | 278 | 2011 |
| Analog synaptic behavior of a silicon nitride memristor S Kim, H Kim, S Hwang, MH Kim, YF Chang, BG Park ACS applied materials & interfaces 9 (46), 40420-40427, 2017 | 250 | 2017 |
| RF performance and small-signal parameter extraction of junctionless silicon nanowire MOSFETs S Cho, KR Kim, BG Park, IM Kang IEEE Transactions on Electron Devices 58 (5), 1388-1396, 2011 | 214 | 2011 |
| Semiconductor devices and methods of driving the same JH Oh, KC Ryoo, B Park, K Oh, IG Baek US Patent 8,472,237, 2013 | 185 | 2013 |
| Evidence of double layer quantum dot formation in a silicon-on-insulator nanowire transistor KH Cho, BH Choi, SH Son, SW Hwang, D Ahn, BG Park, B Naser, JF Lin, ... Applied Physics Letters 86 (4), 2005 | 175 | 2005 |
| Design optimization of gate-all-around (GAA) MOSFETs JY Song, WY Choi, JH Park, JD Lee, BG Park IEEE Transactions on Nanotechnology 5 (3), 186-191, 2006 | 170 | 2006 |
| Design guideline of Si-based L-shaped tunneling field-effect transistors SW Kim, WY Choi, MC Sun, HW Kim, BG Park Japanese Journal of Applied Physics 51 (6S), 06FE09, 2012 | 152 | 2012 |
| The analysis of dark signals in the CMOS APS imagers from the characterization of test structures HI Kwon, IM Kang, BG Park, JD Lee, SS Park IEEE Transactions on Electron Devices 51 (2), 178-184, 2004 | 147 | 2004 |
| Methods of fabricating semiconductor device using high-K layer for spacer etch stop and related devices M Sun, B Park US Patent 8,481,392, 2013 | 135 | 2013 |
| Multilevel vertical-channel SONOS nonvolatile memory on SOI YK Lee, JS Sim, SK Sung, CJ Lee, TH Kim, JD Lee, BG Park, DH Lee, ... IEEE Electron Device Letters 23 (11), 664-666, 2002 | 129 | 2002 |
| Neuronal dynamics in HfO x/AlO y-based homeothermic synaptic memristors with low-power and homogeneous resistive switching S Kim, J Chen, YC Chen, MH Kim, H Kim, MW Kwon, S Hwang, M Ismail, ... Nanoscale 11 (1), 237-245, 2019 | 117 | 2019 |
| Resistive switching characteristics of Si3N4-based resistive-switching random-access memory cell with tunnel barrier for high density integration and low-power applications S Kim, S Jung, MH Kim, S Cho, BG Park Applied Physics Letters 106 (21), 2015 | 113 | 2015 |
| Hysteresis mechanism and reduction method in the bottom-contact pentacene thin-film transistors with cross-linked poly (vinyl alcohol) gate insulator CA Lee, DW Park, SH Jin, IH Park, JD Lee, BG Park Applied Physics Letters 88 (25), 2006 | 111 | 2006 |
| Double-gate TFET with vertical channel sandwiched by lightly doped Si JH Kim, S Kim, BG Park IEEE Transactions on Electron Devices 66 (4), 1656-1661, 2019 | 104 | 2019 |
| Analyses on small-signal parameters and radio-frequency modeling of gate-all-around tunneling field-effect transistors S Cho, JS Lee, KR Kim, BG Park, JS Harris, IM Kang IEEE transactions on electron devices 58 (12), 4164-4171, 2011 | 104 | 2011 |
| Scaling effect on silicon nitride memristor with highly doped Si substrate S Kim, S Jung, MH Kim, YC Chen, YF Chang, KC Ryoo, S Cho, JH Lee, ... Small 14 (19), 1704062, 2018 | 103 | 2018 |
| Silicon-based floating-body synaptic transistor with frequency-dependent short-and long-term memories H Kim, J Park, MW Kwon, JH Lee, BG Park IEEE Electron Device Letters 37 (3), 249-252, 2016 | 96 | 2016 |
Jong-Ho LeeDepartment of Electrical and Computer Engineering, Seoul National Universitysnu.ac.kr의 이메일 확인됨