A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications V Sharma, M Gopal, P Singh, SK Vishvakarma, SS Chouhan Analog Integrated Circuits and Signal Processing 98 (2), 331-346, 2019 | 54 | 2019 |
Ultra-low power high stability 8T SRAM for application in object tracking system P Singh, SK Vishvakarma IEEE Access 6, 2279-2290, 2017 | 40 | 2017 |
A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications V Sharma, M Gopal, P Singh, SK Vishvakarma AEU-International Journal of Electronics and Communications 87, 144-157, 2018 | 37 | 2018 |
Ultra-Low Power, Process-Tolerant 10T (PT10T) SRAM with Improved Read/Write Ability for Internet of Things (IoT) Applications P Singh, S Vishvakarma Journal of Low Power Electronics and Applications 7 (3), 23, 2017 | 26 | 2017 |
Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design P Singh, BS Reniwal, V Vijayvargiya, V Sharma, SK Vishvakarma Integration 62, 1-13, 2018 | 24 | 2018 |
Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applications V Vijayvargiya, BS Reniwal, P Singh, SK Vishvakarma Electronics Letters 52 (7), 559-560, 2016 | 24 | 2016 |
Impact of device engineering on analog/RF performances of tunnel field effect transistors V Vijayvargiya, BS Reniwal, P Singh, SK Vishvakarma Semiconductor Science and Technology 32 (6), 065005, 2017 | 23 | 2017 |
RTL level implementation of High Speed-Low power viterbi encoder and Decoder P Singh, S Vishvakarma IEEE third International conference on information Science and Technology, China, 2013 | 13* | 2013 |
Device/Circuit/Architectural techniques for ultra-low power FPGA design P Singh, SK Vishvakarma Microelectronics and Solid State Electronics 2 (A), 1-15, 2013 | 11 | 2013 |
Design of cost-efficient SRAM cell in quantum dot cellular automata technology SM Bhat, S Ahmed, AN Bahar, KA Wahid, A Otsuki, P Singh Electronics 12 (2), 367, 2023 | 9 | 2023 |
Design of high speed DDR SDRAM controller with less logic utilization P Singh, B Reniwal, V Vijayvargiya, SK Vishvakarma 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-6, 2014 | 9 | 2014 |
A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM B Reniwal, S., P Singh, V Vijayvargiya, SK Vishvakarma IEEE VLSI Design Conf. 2017, 6, 2017 | 8 | 2017 |
Energy efficient, Hamming code technique for error detection/correction using in-memory computation S Kavitha, P Singh, AP Shah, SK Vishwakarma, BS Reniwal 2021 25th International Symposium on VLSI Design and Test (VDAT), 1-4, 2021 | 6 | 2021 |
Dynamic power reduction through clock gating technique for low power memory applications GSR Srivatsava, P Singh, S Gaggar, SK Vishvakarma 2015 IEEE international conference on electrical, computer and communication …, 2015 | 6 | 2015 |
Financial forecasting by improved fragmentation algorithm of Granular Fragment based mining S Patil, R Argiddi, S Apte 2015 International Conference on Pervasive Computing (ICPC), 1-6, 2015 | 5* | 2015 |
Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET BS Reniwal, V Vijayvargiya, P Singh, SK Vishvakarma, D Dwivedi Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 95-98, 2015 | 4 | 2015 |
Low complexity-low power object tracking using dynamic quadtree pixelation and macroblock resizing P Singh, SK Vishvakarma Pattern Recognition and Image Analysis 27, 731-739, 2017 | 3 | 2017 |
An auto-calibrated sense amplifier with offset prediction approach for energy-efficient SRAM BS Reniwal, V Vijayvargiya, P Singh, NK Yadav, SK Vishvakarma, ... Circuits, Systems, and Signal Processing 38, 1482-1505, 2019 | 2 | 2019 |
Design of SRAM cell using an optimized D-latch in quantum-dot cellular automata (QCA) technology NK Rathore, P Singh Journal of Applied Physics 136 (13), 2024 | 1 | 2024 |
Dynamic feedback controlled static random access memory for low power applications P Singh, BS Reniwal, V Vijayvargiya, V Sharma, SK Vishvakarma Journal of Low Power Electronics 13 (1), 47-59, 2017 | 1 | 2017 |