Performance and design considerations for gate-all-around stacked-NanoWires FETs S Barraud, V Lapras, B Previtali, MP Samson, J Lacord, S Martinie, ... 2017 IEEE international electron devices meeting (IEDM), 29.2. 1-29.2. 4, 2017 | 151 | 2017 |
Evidence of supercoupling effect in ultrathin silicon layers using a four-gate MOSFET S Cristoloveanu, S Athanasiou, M Bawedin, P Galy IEEE Electron Device Letters 38 (2), 157-159, 2016 | 33 | 2016 |
Molecular junctions made of tungsten-polyoxometalate self-assembled monolayers: Towards polyoxometalate-based molecular electronics devices D Velessiotis, AM Douvas, S Athanasiou, B Nilsson, G Petersson, ... Microelectronic engineering 88 (8), 2775-2777, 2011 | 24 | 2011 |
Novel ultrathin FD-SOI BIMOS device with reconfigurable operation S Athanasiou, CA Legrand, S Cristoloveanu, P Galy IEEE Transactions on Electron Devices 64 (3), 916-922, 2017 | 13 | 2017 |
BIMOS transistor in thin silicon film and new solutions for ESD protection in FDSOI UTBB CMOS technology P Galy, S Athanasiou, S Cristoloveanu EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015 | 13 | 2015 |
Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology S Athanasiou, CA Legrand, S Cristoloveanu, P Galy Solid-State Electronics 128, 172-179, 2017 | 12 | 2017 |
GDNMOS: A new high voltage device for ESD protection in 28nm UTBB FD-SOI technology S Athanasiou, CA Legrand, S Cristoloveanu, P Galy 2016 Joint International EUROSOI Workshop and International Conference on …, 2016 | 11 | 2016 |
Preliminary results on TFET—Gated diode in thin silicon film for IO design & ESD protection in 28nm UTBB FD-SOI CMOS technology P Galy, S Athanasiou 2016 International Conference on IC Design and Technology (ICICDT), 1-4, 2016 | 10 | 2016 |
Integrated circuit cointegrating a FET transistor and a RRAM memory point L Grenouillet, S Athanasiou, P Galy US Patent 9,831,288, 2017 | 8 | 2017 |
Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate S Athanasiou, P Galy US Patent 10,096,708, 2018 | 6 | 2018 |
Substrate contact land for an MOS transistor in an SOI substrate, in particular an FDSOI substrate P Galy, S Athanasiou US Patent 9,837,413, 2017 | 6 | 2017 |
Preliminary 3D TCAD Electro-thermal Simulations of BIMOS transistor in thin silicon film for ESD protection in FDSOI UTBB CMOS technology S Athanasiou, S Cristoloveanu, P Galy 2015 International Conference on IC Design & Technology (ICICDT), 1-4, 2015 | 5 | 2015 |
Impact of back plane on the carrier mobility in 28nm UTBB FDSOI devices, for ESD applications S Athanasiou, P Galy, S Cristoloveanu EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015 | 4 | 2015 |
Transistor structure S Athanasiou, P Galy US Patent 10,367,068, 2019 | 3 | 2019 |
Key parameters of BiMOS ESD protection device for UTBB FDSOI advanced technology S Athanasiou, S Cristoloveanu, P Galy 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2015 | 3 | 2015 |
BIMOS transistor solutions for ESD protection in FD-SOI UTBB CMOS technology P Galy, S Athanasiou, S Cristoloveanu Solid-State Electronics 115, 192-200, 2016 | 2 | 2016 |
Measurement of set injected charge from a californium-252 source in 340 nm straight and enclosed layout nmos and pmos transistors D Englisch, M Horstmann, S Athanasiou, RJE Jansen, B Glass 2015 15th European Conference on Radiation and Its Effects on Components and …, 2015 | 2 | 2015 |
Holistic plug-n-play autonomous solar system integration: a real-life small-scale demonstration—a practical approach A Dimara, C Sougles, S Athanasiou, K Grigoropoulos, P Sfakianou, ... Electrical Engineering 105 (5), 2715-2733, 2023 | 1 | 2023 |
Device for protection against electrostatic discharges with a distributed trigger circuit P Galy, S Athanasiou US Patent 9,947,650, 2018 | 1 | 2018 |
Ultrathin FDSOI four-gate transistors (G4-FETs) S Athanasiou, M Bawedin, P Galy, S Cristoloveanu Microelectronic Engineering 180, 1-4, 2017 | 1 | 2017 |