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Gaetano Palumbo
Gaetano Palumbo
DIEEI -University of Catania
dieei.unict.it의 이메일 확인됨 - 홈페이지
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A low-voltage low-power voltage reference based on subthreshold MOSFETs
G Giustolisi, G Palumbo, M Criscione, F Cutri
IEEE Journal of Solid-State Circuits 38 (1), 151-154, 2003
4352003
Charge pump circuits: An overview on design strategies and topologies
G Palumbo, D Pappalardo
IEEE Circuits and Systems Magazine 10 (1), 31-45, 2010
4322010
Analysis and comparison on full adder block in submicron technology
M Alioto, G Palumbo
IEEE transactions on very large scale integration (VLSI) systems 10 (6), 806-823, 2002
3132002
Charge-pump circuits: Power-consumption optimization
G Palumbo, D Pappalardo, M Gaibotti
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2002
2702002
Understanding the effect of process variations on the delay of static and domino logic
M Alioto, G Palumbo, M Pennisi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (5), 697-710, 2009
2362009
Feedback amplifiers: theory and design
G Palumbo, S Pennisi
Springer Science & Business Media, 2002
2232002
Advances in reversed nested Miller compensation
AD Grasso, G Palumbo, S Pennisi
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (7), 1459-1470, 2007
2102007
Model and design of bipolar and MOS current-mode logic: CML, ECL and SCL digital circuits
M Alioto, G Palumbo
Springer Science & Business Media, 2005
2002005
Design procedure for two-stage CMOS transconductance operational amplifiers: A tutorial
G Palmisano, G Palumbo, S Pennisi
Analog Integrated Circuits and Signal Processing 27, 179-189, 2001
1842001
Design methodology and advances in nested-Miller compensation
G Palumbo, S Pennisi
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2002
1822002
CMOS current amplifiers
G Palmisano, G Palumbo, S Pennisi
Springer Science & Business Media, 1999
1661999
A compensation strategy for two-stage CMOS opamps based on current buffer
G Palmisano, G Palumbo
IEEE transactions on circuits and systems I: fundamental theory and …, 1997
1541997
Analysis and comparison in the energy-delay-area domain of nanometer CMOS flip-flops: Part I—Methodology and design strategies
M Alioto, E Consoli, G Palumbo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (5), 725-736, 2010
1452010
Design guidelines for reversed nested Miller compensation in three-stage amplifiers
R Mita, G Palumbo, S Pennisi
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003
1402003
Design strategies for source coupled logic gates
M Alioto, G Palumbo
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2003
1322003
General strategies to design nanometer flip-flops in the energy-delay space
M Alioto, E Consoli, G Palumbo
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (7), 1583-1596, 2009
1262009
Autonomous energy-efficient wireless sensor network platform for home/office automation
CS Abella, S Bonina, A Cucuccio, S D’Angelo, G Giustolisi, AD Grasso, ...
IEEE Sensors Journal 19 (9), 3501-3512, 2019
1222019
Variable stage charge pump
D Pappalardo, M Gaibotti, G Palumbo, A Conte, SL Giudice
US Patent 6,927,441, 2005
1192005
A review of charge pump topologies for the power management of IoT nodes
A Ballo, AD Grasso, G Palumbo
Electronics 8 (5), 480, 2019
1182019
Analysis and comparison in the energy-delay-area domain of nanometer CMOS flip-flops: Part II—Results and figures of merit
M Alioto, E Consoli, G Palumbo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (5), 737-750, 2010
1122010
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