All-digital calibration of timing skews for TIADCs using the polyphase decomposition H Le Duc, DM Nguyen, C Jabbour, T Graba, P Desgreys, O Jamin IEEE Transactions on Circuits and Systems II: Express Briefs 63 (1), 99-103, 2015 | 84 | 2015 |
Fully digital feedforward background calibration of clock skews for sub-sampling TIADCs using the polyphase decomposition H Le Duc, DM Nguyen, C Jabbour, P Desgreys, O Jamin IEEE Transactions on Circuits and Systems I: Regular Papers 64 (6), 1515-1528, 2017 | 74 | 2017 |
A review of machine learning techniques in analog integrated circuit design automation R Mina, C Jabbour, GE Sakr Electronics 11 (3), 435, 2022 | 52 | 2022 |
Hardware implementation of all digital calibration for undersampling TIADCs H Le Duc, DM Nguyen, C Jabbour, T Graba, P Desgreys, O Jamin 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2181-2184, 2015 | 37 | 2015 |
A fully digital background calibration of timing skew in undersampling TI-ADC H Le Duc, C Jabbour, P Desgreys, O Jamin, N Van Tam 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 53-56, 2014 | 35 | 2014 |
Fully-digital blind compensation of non-linear distortions in wideband receivers R Vansebrouck, C Jabbour, O Jamin, P Desgreys IEEE Transactions on Circuits and Systems I: Regular Papers 64 (8), 2112-2123, 2017 | 24 | 2017 |
Wide frequency characterization of intra-body communication for leadless pacemakers M Maldari, M Albatat, J Bergsland, Y Haddab, C Jabbour, P Desgreys IEEE Transactions on Biomedical Engineering 67 (11), 3223-3233, 2020 | 23 | 2020 |
Delay-reduction technique for DWA algorithms C Jabbour, H Fakhoury, P Loumeau IEEE Transactions on Circuits and Systems II: Express Briefs 61 (10), 733-737, 2014 | 18 | 2014 |
A 1 V 65 nm CMOS reconfigurable time interleaved high pass ΣΔ ADC C Jabbour, D Camarero, P Loumeau 2009 IEEE International Symposium on Circuits and Systems, 1557-1560, 2009 | 15 | 2009 |
Direct delta-sigma receiver: Analysis, modelization and simulation MT Nguyen, C Jabbour, C Ouffoue, R Mina, F Sibille, P Loumeau, ... 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1035-1038, 2013 | 14 | 2013 |
Multiband filter for non-contiguous channel aggregation C Jabbour, S Aggarwal, VP Srini US Patent 9,634,702, 2017 | 11 | 2017 |
An FIR memory polynomial predistorter for wideband RF power amplifiers VN Manyam, DKG Pham, C Jabbour, P Desgreys 2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017 | 10 | 2017 |
Estimation techniques for timing mismatch in time-interleaved analog-to-digital converters: Limitations and solutions H Le Duc, C Jabbour, P Desgreys 2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016 | 10 | 2016 |
Cognitive computation and communication: A complement solution to cloud for IoT N Nguyen-Thanh, L Yang, DHN Nguyen, C Jabbour, B Murmann 2016 International Conference on Advanced Technologies for Communications …, 2016 | 9 | 2016 |
A 65nm cmos edge/umts/wlan tri-mode four-channel time-interleaved σδ adc H Fakhoury, C Jabbour, H Khushk, P Loumeau 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA …, 2009 | 9 | 2009 |
Wideband power amplifier predistortion: Trends, challenges and solutions P Desgreys, VN Manyam, K Tchambake, DKG Pham, C Jabbour 2017 IEEE 12th international conference on ASIC (ASICON), 100-103, 2017 | 8 | 2017 |
System Design for Direct RF-to-DigitalReceiver MT Nguyen, C Jabbour, SM Homayouni, D Duperray, P Triaire IEEE Transactions on Circuits and Systems I: Regular Papers 63 (10), 1758-1770, 2016 | 8 | 2016 |
Performance study of nonlinearities blind correction in wideband receivers R Vansebrouck, C Jabbour, P Desgreys, O Jamin, VT Nguyen 2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014 | 8 | 2014 |
A 65 nm CMOS Versatile ADC using Time Interleaving and ΣΔ modulation for Multi-mode Receiver A Beydoun, C Jabbour, H Fakhoury, VT Nguyen, L Naviner, P Loumeau 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA …, 2009 | 8 | 2009 |
Optimizing the number of channels for time interleaved sample-and-hold circuits C Jabbour, D Camarero, P Loumeau 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems …, 2008 | 8 | 2008 |