Stebėti
Akash Kumar
Akash Kumar
Full Professor, Chair of Embedded Systems, Ruhr University Bochum
Patvirtintas el. paštas rub.de
Pavadinimas
Cituota
Cituota
Metai
Mapping on multi/many-core systems: survey of current and emerging trends.
AK Singh, M Shafique, A Kumar, J Henkel
Proceedings of the 50th Annual Design Automation Conference, 2013
5562013
Architectural-space exploration of approximate multipliers
S Rehman, W El-Harouni, M Shafique, A Kumar, J Henkel, J Henkel
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
1782016
Communication-aware heuristics for run-time task mapping on noc-based mpsoc platforms
AK Singh, T Srikanthan, A Kumar, W Jigang
Journal of Systems Architecture 56 (7), 242-255, 2010
1772010
Reinforcement learning-based inter-and intra-application thermal optimization for lifetime improvement of multicore systems
A Das, RA Shafik, GV Merrett, BM Al-Hashimi, A Kumar, B Veeravalli
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
1312014
SMApproxlib library of FPGA-based approximate multipliers
S Ullah, SS Murthy, A Kumar
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
1112018
Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors
S Rai, J Trommer, M Raitza, T Mikolajick, WM Weber, A Kumar
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (3), 560-572, 2018
1042018
An FPGA design flow for reconfigurable network-based multi-processor systems on chip
A Kumar, A Hansson, J Huisken, H Corporaal
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
1042007
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators
S Ullah, S Rehman, BS Prabakaran, F Kriebel, MA Hanif, M Shafique, ...
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
1022018
Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs
A Das, A Kumar, B Veeravalli, C Bolchini, A Miele
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
1022014
Shouji: a fast and efficient pre-alignment filter for sequence alignment
M Alser, H Hassan, A Kumar, O Mutlu, C Alkan
Bioinformatics 35 (21), 4255-4263, 2019
1002019
Locality-aware cta clustering for modern gpus
A Li, SL Song, W Liu, X Liu, A Kumar, H Corporaal
ACM SIGARCH Computer Architecture News 45 (1), 297-311, 2017
972017
Project-based learning in embedded systems education using an FPGA platform
A Kumar, S Fernando, RC Panicker
IEEE transactions on education 56 (4), 407-415, 2013
972013
Adaptive and transparent cache bypassing for GPUs
A Li, GJ van den Braak, A Kumar, H Corporaal
Proceedings of the International Conference for High Performance Computing …, 2015
962015
A low active leakage and high reliability phase change memory (PCM) based non-volatile FPGA storage element
K Huang, Y Ha, R Zhao, A Kumar, Y Lian
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (9), 2605-2613, 2014
962014
Reliability-driven task mapping for lifetime extension of networks-on-chip based multiprocessor systems
A Das, A Kumar, B Veeravalli
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 689-694, 2013
952013
High-Throughput and Low-Power Architectures for Reed Solomon Decoder
A Kumar, S Sawitzki
a. kumar at tue. nl, Eindhoven University of Technology and sergei. sawitzki …, 2005
942005
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
AK Singh, A Kumar, T Srikanthan
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1 …, 2013
912013
High-performance accurate and approximate multipliers for fpga-based hardware accelerators
S Ullah, S Rehman, M Shafique, A Kumar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
892021
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
A Kumar, S Fernando, Y Ha, B Mesman, H Corporaal
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (3 …, 2008
862008
DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems
BS Prabakaran, S Rehman, MA Hanif, S Ullah, G Mazaheri, A Kumar, ...
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 917-920, 2018
722018
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Straipsniai 1–20