FPGA implementation of AES-based crypto processor H Anwar, M Daneshtalab, M Ebrahimi, J Plosila, H Tenhunen 2013 IEEE 20th International Conference on Electronics, Circuits, and …, 2013 | 29 | 2013 |
Parameterized AES-Based Crypto Processor for FPGAs H Anwar, M Daneshtalab, M Ebrahimi, J Plosila, H Tenhunen, S Dytckov, ... 17th Euromicro Conference on Digital System Design (DSD),2014, 465-472, 2014 | 14 | 2014 |
Exploring spiking neural network on coarse-grain reconfigurable architectures H Anwar, SMAH Jafri, S Dytckov, M Daneshtalab, M Ebrahimi, A Hemani Proceedings of International Workshop on Manycore Embedded Systems, 64-67, 2014 | 7 | 2014 |
A probabilistically analysable cache implementation on FPGA H Anwar, C Chen, G Beltrame 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 1-4, 2015 | 4 | 2015 |
Efficient STDP Micro-Architecture for Silicon Spiking Neural Networks S Dytckov, M Daneshtalab, M Ebrahimi, H Anwar, J Plosila, H Tenhunen 17th Euromicro Conference on Digital System Design (DSD),2014, 496 - 503, 2014 | 4 | 2014 |
Integration of AES on heterogeneous many-core system H Anwar, M Daneshtalab, M Ebrahimi, M Ramirez, J Plosila, H Tenhunen 2014 22nd Euromicro International Conference on Parallel, Distributed, and …, 2014 | 3 | 2014 |