Ising-CIM: A reconfigurable and scalable compute within memory analog Ising accelerator for solving combinatorial optimization problems S Xie, SRS Raman, C Ni, M Wang, M Yang, JP Kulkarni IEEE Journal of Solid-State Circuits 57 (11), 3453-3465, 2022 | 22 | 2022 |
Ultra-low-voltage UTBB-SOI-based, pseudo-static storage circuits for cryogenic CMOS applications SST Nibhanupudi, SRS Raman, M Cassé, L Hutin, JP Kulkarni IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 14 | 2021 |
Compute-in-eDRAM with backend integrated indium gallium zinc oxide transistors SRS Raman, S Xie, JP Kulkarni 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 14 | 2021 |
High noise margin, digital logic design using josephson junction field-effect transistors for cryogenic computing SRS Raman, F Wen, R Pillarisetty, V De, JP Kulkarni IEEE Transactions on Applied Superconductivity 31 (5), 1-5, 2021 | 11 | 2021 |
Phase transition material-assisted low-power SRAM design SST Nibhanupudi, SRS Raman, JP Kulkarni IEEE Transactions on Electron Devices 68 (5), 2281-2288, 2021 | 9 | 2021 |
Enabling in-memory computations in non-volatile sram designs SRS Raman, SST Nibhanupudi, JP Kulkarni IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (2 …, 2022 | 8 | 2022 |
IGZO CIM: Enabling in-memory computations using multilevel capacitorless indium–gallium–zinc–oxide-based embedded DRAM technology SRS Raman, S Xie, JP Kulkarni IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 8 …, 2022 | 7 | 2022 |
Threshold selector and capacitive coupled assist techniques for write voltage reduction in metal–ferroelectric–metal field-effect transistor SRS Raman, SST Nibhanupudi, AK Saha, S Gupta, JP Kulkarni IEEE Transactions on Electron Devices 68 (12), 6132-6138, 2021 | 7 | 2021 |
NEM-GNN: DAC/ADC-less, Scalable, Reconfigurable, Graph and Sparsity-Aware Near-Memory Accelerator for Graph Neural Networks SR Sundara Raman, L John, JP Kulkarni ACM Transactions on Architecture and Code Optimization 21 (2), 1-26, 2024 | 2 | 2024 |
Sachi: A stationarity-aware, all-digital, near-memory, ising architecture SRS Raman, LK John, JP Kulkarni 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 2 | 2024 |
Pt/Cu: ZnO/Nb: STO memristive dual port for cache memory applications PKR Boppidi, SS Raman, H Renuka, S Kundu AIP Conference Proceedings 2265 (1), 2020 | 2 | 2020 |
A review on non-volatile and volatile emerging memory technologies SRS Raman Computer Memory and Data Storage, 2024 | 1 | 2024 |
A Robust, Efficient FPGA based implementation of edge detection using Sobel mask SS Raman, R Gottipati Asian Journal For Convergence In Technology (AJCT) ISSN-2350-1146 4 (3), 2018 | | 2018 |
SPARK: Sparsity Aware, Low Area, Energy-Efficient, Near-memory Architecture for Accelerating Linear Programming Problems SRS Raman, L John, JP Kulkarni | | |
ii Special Topic on Oxide Electronics for Beyond CMOS Logic and Memory by DE Nikonov PAPERS SRS Raman, S Xie, JP Kulkarni, S Narla, P Kumar, AF Laguna, D Reis, ... | | |