D Barlage

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Kenneth CadienProfessor of Materials Engineering, University of AlbertaPatvirtintas el. paštas ualberta.ca
Amir AfsharUniversity of Alberta, PhDPatvirtintas el. paštas ualberta.ca
Karthik ShankarFuture Energy Systems (FES), University of AlbertaPatvirtintas el. paštas ualberta.ca
Triratna MuneshwarIndian Institute of Technology Bombay, University of AlbertaPatvirtintas el. paštas iitb.ac.in
John MuthNorth Carolina State UniversityPatvirtintas el. paštas ncsu.edu
Robert C. Fitch, Jr.Principal Electronics Engineer, AFRLPatvirtintas el. paštas us.af.mil
Tania PaskovaECE Dept. NCSUPatvirtintas el. paštas ncsu.edu
Edward PrebleRTI InternationalPatvirtintas el. paštas rti.org
Robert F. DavisCarnegie Mellon UniversityPatvirtintas el. paštas andrew.cmu.edu
Paul FranzonProfessor of Electrical and Computer Engineering, North Carolina State UniversityPatvirtintas el. paštas ncsu.edu
Pouyan MotamediUniversity of AlbertaPatvirtintas el. paštas ualberta.ca
Ravi GaikwadPost doctoral fellow, University of AlbertaPatvirtintas el. paštas ualberta.ca
Prashanthi Kovur, Ph.D.University of AlbertaPatvirtintas el. paštas ualberta.ca
Jesse JurState of North CarolinaPatvirtintas el. paštas commerce.nc.gov
Fareen Adeni KhajaApplied MaterialsPatvirtintas el. paštas amat.com
Shivaraman RamachandranSquare IncPatvirtintas el. paštas wharton.upenn.edu
Kun-Yu LaiDepartment of Optics and Photonics at National Central UniversityPatvirtintas el. paštas ncu.edu.tw
Kevin UdwaryDirector of Engineering, Kyma technologiesPatvirtintas el. paštas kymatech.com
Roger ZempUniversity of AlbertaPatvirtintas el. paštas ualberta.ca
Kaustav BanerjeeUC Santa Barbara, Stanford University, UC BerkeleyPatvirtintas el. paštas ece.ucsb.edu

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D Barlage

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Patvirtintas el. paštas ualberta.ca

Electronics Material Science


Pavadinimas Rūšiuoti pagal šaltinius Rūšiuoti pagal metus Rūšiuoti pagal pavadinimą	Cituota Cituota	Metai
Tri-gate devices and methods of fabrication RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta US Patent 7,358,121, 2008	596	2008
Tri-gate devices and methods of fabrication RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland US Patent 6,858,478, 2005	503	2005
A 50 nm depleted-substrate CMOS transistor (DST) R Chau, J Kavalieros, B Doyle, A Murthy, N Paulsen, D Lionberger, ... International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001	288	2001
Transistor Elements for 30nm Physical Gate Lengths and Beyond. B Doyle, R Arghavani, D Barlage, S Datta, M Doczy, J Kavalieros, ... Intel Technology Journal 6 (2), 2002	235	2002
30 nm physical gate length CMOS transistors with 1.0 ps n-MOS and 1.7 ps p-MOS gate delays R Chau, J Kavalieros, B Roberds, R Schenker, D Lionberger, D Barlage, ... International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000	169	2000
Tri-gate devices and methods of fabrication RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland US Patent 7,005,366, 2006	102	2006
Methods for nanoscale structures from optical lithography and subsequent lateral growth M Johnson, D Barlage, J Muth US Patent App. 10/550,178, 2007	87	2007
High-frequency response of 100 nm integrated CMOS transistors with high-K gate dielectrics D Barlage, R Arghavani, G Dewey, M Doczy, B Doyle, J Kavalieros, ... International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001	87	2001
Plasma nitridation for reduced leakage gate dielectric layers R McFadden, J Kavalieros, R Arghavani, D Barlage, R Chau US Patent 6,610,615, 2003	82	2003
Zinc oxide thin film transistors with Schottky source barriers AM Ma, M Gupta, FR Chowdhury, M Shen, K Bothe, K Shankar, Y Tsui, ... Solid-State Electronics 76, 104-108, 2012	72	2012
High-speed InGaP/GaAs HBTs with a strained In/sub x/Ga/sub 1-x/As base DA Ahmari, MT Fresina, QJ Hartmann, DW Barlage, PJ Mares, M Feng, ... IEEE Electron Device Letters 17 (5), 226-228, 1996	71	1996
Tri-gate devices and methods of fabrication RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland US Patent 6,914,295, 2005	69	2005
Inversion MOS capacitance extraction for high-leakage dielectrics using a transmission line equivalent circuit DW Barlage, JT O'Keeffe, JT Kavalieros, MM Nguyen, RS Chau IEEE Electron Device Letters 21 (9), 454-456, 2000	60	2000
IEDM Tech. Dig. R Chau, J Kavalieros, B Roberds, R Schenker, D Lionberger, D Barlage IEDM Tech. Dig, 45, 2000	55	2000
Method for making a semiconductor device having a high-k gate dielectric RS Chau, TE Glassman, CG Parker, MV Metz, LJ Foley, R Arghavani, ... US Patent 6,713,358, 2004	48	2004
Effect of Interfacial Roughness Parameters on the Fiber Pushout Behavior of a Model Composite TAPDRBPDJRJ Kerans Journal of the American Ceramic Society 77 (12), 3232-3236, 1994	46	1994
Electrical Comparison of and Gate Dielectrics on GaN KM Bothe, PA von Hauff, A Afshar, A Foroughi-Abari, KC Cadien, ... IEEE transactions on electron devices 60 (12), 4119-4124, 2013	41	2013
Tri-gate devices and methods of fabrication RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta US Patent 7,560,756, 2009	41	2009
Schottky Barrier Thin Film Transistors Using Solution-Processed n-ZnO AH Adl, A Ma, M Gupta, M Benlamri, YY Tsui, DW Barlage, K Shankar ACS Applied Materials & Interfaces 4 (3), 1423-1428, 2012	39	2012
Analytical threshold voltage model with TCAD simulation verification for design and evaluation of tri-gate MOSFETs Y Jin, C Zeng, L Ma, D Barlage Solid-state electronics 51 (3), 347-353, 2007	35	2007

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