Two-direction in-memory computing based on 10T SRAM with horizontal and vertical decoupled read ports Z Lin, Z Zhu, H Zhan, C Peng, X Wu, Y Yao, J Niu, J Chen IEEE Journal of Solid-State Circuits 56 (9), 2832-2844, 2021 | 68 | 2021 |
In-memory computing with double word lines and three read ports for four operands Z Lin, H Zhan, X Li, C Peng, W Lu, X Wu, J Chen IEEE transactions on very large scale integration (VLSI) systems 28 (5 …, 2020 | 52 | 2020 |
Cascade current mirror to improve linearity and consistency in SRAM in-memory computing Z Lin, H Zhan, Z Chen, C Peng, X Wu, W Lu, Q Zhao, X Li, J Chen IEEE Journal of Solid-State Circuits 56 (8), 2550-2562, 2021 | 42 | 2021 |
High-Speed and Energy-Efficient Single-Port Content Addressable Memory to Achieve Dual-Port Operation H Zhan, C Wang, H Cui, X Liu, F Liu, X Cheng 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 4 | 2023 |
MBAPIS: Multi-Level Behavior Analysis Guided Program Interval Selection for Microarchitecture Studies H Cui, Y Cui, H Zhan, S Liang, X Liu, C Yang, X Cheng 2023 32nd International Conference on Parallel Architectures and Compilation …, 2023 | 1 | 2023 |
A Hardware-Software Cooperative Interval-Replaying for FPGA-based Architecture Evaluation H Cui, S Liang, Y Cui, W Zhang, H Zhan, C Yang, X Liu, X Cheng 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2023 | 1 | 2023 |
Multi: Reduce Energy Overhead of Criticality-Aware Dynamic Instruction Scheduling for Energy Efficiency H Zhan, C Wang, X Wang, C Yang, X Liu, X Cheng 2024 IEEE 42nd International Conference on Computer Design (ICCD), 60-67, 2024 | | 2024 |