| Fully integrated buck converter with fourth-order low-pass filter N Tang, B Nguyen, R Molavi, S Mirabbasi, Y Tang, P Zhang, J Kim, ... IEEE transactions on power electronics 32 (5), 3700-3707, 2016 | 39 | 2016 |
| 8.4 fully integrated buck converter with 78% efficiency at 365mW output power enabled by switched-inductor capacitor topology and inductor current reduction technique N Tang, B Nguyen, Y Tang, W Hong, Z Zhou, D Heo 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 152-154, 2019 | 36 | 2019 |
| A new single-error correction scheme based on self-diagnosis residue number arithmetic Y Tang, E Boutillon, C Jégo, M Jézéquel 2010 Conference on Design and Architectures for Signal and Image Processing …, 2010 | 24 | 2010 |
| Hardware discrete channel emulator E Boutillon, Y Tang, C Marchand, P Bomel 2010 International Conference on High Performance Computing & Simulation …, 2010 | 21 | 2010 |
| Analog-assisted digital capacitorless low-dropout regulator supporting wide load range N Tang, Y Tang, Z Zhou, B Nguyen, W Hong, P Zhang, JH Kim, D Heo IEEE Transactions on Industrial Electronics 66 (3), 1799-1808, 2018 | 13 | 2018 |
| An LDPC decoding method for fault-tolerant digital logic Y Tang, C Winstead, E Boutillon, C Jego, M Jezequel 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 3025-3028, 2012 | 13 | 2012 |
| A space-time redundancy technique for embedded stochastic error correction C Winstead, Y Tang, E Boutillon, C Jego, M Jezequel 2012 7th International Symposium on Turbo Codes and Iterative Information …, 2012 | 11 | 2012 |
| A sub-1V analog-assisted inverter-based digital low-dropout regulator with a fast response time at 25mA/100ps and 99.4% current efficiency B Nguyen, N Tang, Z Zhou, W Hong, D Heo, Y Tang, P Zhang 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 9 | 2019 |
| Hardware efficiency versus error probability in unreliable computation Y Tang, E Boutillon, C Jégo, M Jézéquel 2011 IEEE Workshop on Signal Processing Systems (SiPS), 168-173, 2011 | 7 | 2011 |
| Universal error-correction circuit with fault-tolerant nature, and decoder and triple modular redundancy circuit that apply it T Yangyang, CX Zhang US Patent 9,577,960, 2017 | 4 | 2017 |
| Voltage regulator and resonant gate driver thereof T Yangyang, CX Zhang US Patent 9,584,109, 2017 | 3 | 2017 |
| Muller C-element based Decoder (MCD): A decoder against transient faults Y Tang, E Boutillon, C Winstead, C Jégo, M Jézéquel 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1680-1683, 2013 | 3 | 2013 |
| Computation on unreliable architecture Y Tang Lorient, 2013 | 2 | 2013 |
| HIPDN: Apower DISTRIBUTION NETWORK FOR EFFICIENT ON-CHIP POWER DELIVERY AND FINE-GRAIN LOW-POWER APPLICATIONS Y Tang, X Wang, N Tang, B Nguyen, D Heo, P Zhang Circuits and Systems: An International Journal 1 (3), 27-41, 2014 | 1 | 2014 |
| Voltage Regulation Circuit and Voltage Regulation Method T Yangyang, J Zhang, H Liu, YAO Cong, X Wang, CX Zhang US Patent App. 16/416,778, 2019 | | 2019 |
| Voltage regulation method, controller, and chip X Wang, T Yangyang, X Jin, Y Zhonglei US Patent 10,394,262, 2019 | | 2019 |
| Ultra-low working voltage rail-to-rail operational amplifier, and differential input amplification-stage circuit and output-stage circuit thereof T Yangyang, CX Zhang US Patent 10,270,391, 2019 | | 2019 |
| PWM-skipping technique for overshoot and undershoot mitigation Y Tang, N Tang, Z Zhou, D Heo, X Wang, P Liu, P Zhang International Journal of Electronics Letters 5 (4), 395-401, 2017 | | 2017 |
| Calcul sur architecture non fiable T Yangyang Université de Bretagne Sud, 2013 | | 2013 |
| Techniques and prospects for fault-tolerance in post-CMOS ULSI Y Tang, S Gopalakrishnan, C Winstead, E Boutillon, C Jégo, M Jézéquel ULSIWS 2012: 21st International Workshop on Post-Binary ULSI Systems, 1-7, 2012 | | 2012 |
