| Probing attacks on integrated circuits: Challenges and research opportunities H Wang, D Forte, MM Tehranipoor, Q Shi IEEE Design & Test 34 (5), 63-71, 2017 | 120 | 2017 |
| Defense-in-depth: A recipe for logic locking to prevail MT Rahman, MS Rahman, H Wang, S Tajik, W Khalil, F Farahmandi, ... Integration 72, 39-57, 2020 | 109 | 2020 |
| Sofi: Security property-driven vulnerability assessments of ics against fault-injection attacks H Wang, H Li, F Rahman, MM Tehranipoor, F Farahmandi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 61 | 2021 |
| A physical design flow against front-side probing attacks by internal shielding H Wang, Q Shi, A Nahiyan, D Forte, MM Tehranipoor IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 50 | 2019 |
| Probing assessment framework and evaluation of antiprobing solutions H Wang, Q Shi, D Forte, MM Tehranipoor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (6 …, 2019 | 35 | 2019 |
| Lithium diffusion in silicon and induced structure disorder: A molecular dynamics study H Wang, X Ji, C Chen, K Xu, L Miao AIP Advances 3 (11), 2013 | 35 | 2013 |
| ACED-IT: Assuring confidential electronic design against insider threats in a zero-trust environment A Stern, H Wang, F Rahman, F Farahmandi, M Tehranipoor IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 14 | 2021 |
| A comprehensive analysis on vulnerability of active shields to tilted microprobing attacks Q Shi, H Wang, N Asadizanjani, MM Tehranipoor, D Forte 2018 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 98-103, 2018 | 8 | 2018 |
| A comprehensive stochastic design methodology for hold-timing resiliency in voltage-scalable design Z Chen, H Wang, G Xie, J Gu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (10 …, 2018 | 5 | 2018 |
| Security property-driven vulnerability assessments of ICs against fault-injection attacks MM Tehranipoor, F Farahmandi, H Wang US Patent 12,204,685, 2025 | 2 | 2025 |
| iPROBE V2: Internal shielding-based countermeasures against both back-side and front-side probing attacks M Gao, H Wang, MM Tehranipoor, D Forte SRC TECHCON, 2020 | 1 | 2020 |
| Comprehensive analysis, modeling and design for hold-timing resiliency in voltage scalable design H Wang, G Xie, J Gu Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 1 | 2016 |
| Security Property-Driven Fault-Injection Vulnerability Assessment of Modern SoCs H Wang, H Li, F Rahman, F Farahmandi, M Tehranipoor Intel Security Conference (iSecCon), 2021, 2021 | | 2021 |
| PREVENTION OF FRONT-SIDE PROBING ATTACKS HS Domenic J Forte, Mark M Tehranipoor, Qihang Shi, Huanyu Wang US Patent US20210224449A1, 2021 | | 2021 |
| A Framework for Assessing the Vulnerability of ICs Against Fault Injection Attacks H Wang, M Tehranipoor Synopsys Users Group (SNUG), 2021, 2021 | | 2021 |
| GOMACTech: Security Property-Driven Vulnerability Assessment of ICs Against Fault-Injection Attacks H Wang, H Li, F Farahmandi, M Tehranipoor GOMACTech 2021 53, 2021 | | 2021 |
| iProbe: A physical design flow against front-side probing attacks by internal shielding H Wang, Q Shi, A Nahiyan, D Forte, MM Tehranipoor SRC TECHCON 2018, 2019 | | 2019 |
Mark M. TehranipoorIntel Charles E. Young Endowed Chair Professor, ECE, University of FloridaVerifisert e-postadresse på ufl.edu