| Using run-time reconfiguration for fault injection in hardware prototypes L Antoni, R Leveugle, M Feher 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2002 | 180 | 2002 |
| Using run-time reconfiguration for fault injection applications L Antoni, R Leveugle, B Fehér IEEE Transactions on Instrumentation and Measurement 52 (5), 1468-1473, 2003 | 129 | 2003 |
| A full-parallel digital implementation for pre-trained NNs T Szabó, L Antoni, G Horváth, B Fehér Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural …, 2000 | 36 | 2000 |
| Acoustic source localization fusing sparse direction of arrival estimates A Ledeczi, G Kiss, B Feher, P Volgyesi, G Balogh 2006 International Workshop on Intelligent Solutions in Embedded Systems, 1-13, 2006 | 29 | 2006 |
| Molecular docking on FPGA and GPU platforms I Pechan, B Feher 2011 21st International Conference on Field Programmable Logic and …, 2011 | 28 | 2011 |
| Application of partial reconfiguration of FPGAs in image processing T Raikovich, B Fehér 6th Conference on Ph. D. Research in Microelectronics & Electronics, 1-4, 2010 | 21 | 2010 |
| FPGA-based acceleration of the AutoDock molecular docking software I Pechan, B Fehér, A Bérces 6th Conference on Ph. D. Research in Microelectronics & Electronics, 1-4, 2010 | 20 | 2010 |
| Efficient synthesis of distributed vector multipliers B Fehér Microprocessing and microprogramming 38 (1-5), 345-350, 1993 | 17 | 1993 |
| Dependability analysis: A new application for run-time reconfiguration R Leveugle, L Antoni, B Fehér Proceedings International Parallel and Distributed Processing Symposium, 7 pp., 2003 | 16 | 2003 |
| Digital filters based on recursive Walsh-Hadamard transformation G Peceli, B Feher IEEE transactions on circuits and systems 37 (1), 150-152, 1990 | 15 | 1990 |
| Hierarchical histogram-based median filter for gpus P Szántó, B Fehér Acta Polytechnica Hungarica 15 (2), 49-68, 2018 | 14 | 2018 |
| Acoustic source localization with high performance sensor nodes MR Azimi-Sadjadi, G Kiss, B Fehér, S Srinivasan, A Ledeczi Unattended Ground, Sea, and Air Sensor Technologies and Applications IX 6562 …, 2007 | 14 | 2007 |
| Hardware accelerated molecular docking: A survey I Pechan, B Fehér Bioinformatics, 2012 | 13 | 2012 |
| Neural network implementation using distributed arithmetic T Szabó, B Fehér, G Horváth 1998 Second International Conference. Knowledge-Based Intelligent Electronic …, 1998 | 11 | 1998 |
| Efficient implementation of convolutional neural networks on FPGA A Hadnagy, B Fehér, T Kovácsházy 2018 19th International Carpathian Control Conference (ICCC), 359-364, 2018 | 8 | 2018 |
| An efficient implementation for a matrix-vector multiplier structure T Szabó, L Antoni, G Horváth, B Fehér Proceedings of IEEE International Joint Conference on Neural Networtks …, 2000 | 7 | 2000 |
| Scalable architecture for rank order filtering P Szántó, G Szedo, B Fehér, WC Chung US Patent 8,005,881, 2011 | 5 | 2011 |
| Parallel sorting algorithms in fpga A Széll 13Th Phd Mini-Symposium, 8, 2006 | 5 | 2006 |
| Application of bit-serial arithmetic units for FPGA implementation of convolutional neural networks G Csordás, B Fehér, T Kovácsházy 2018 19th International Carpathian Control Conference (ICCC), 322-327, 2018 | 4 | 2018 |
| High‐Performance Timing‐Driven Rank Filter P Szántó, G Szedő, B Fehér VLSI Design 2008 (1), 753043, 2008 | 4 | 2008 |
