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Samir Labiod
Samir Labiod
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Analytical compact model of nanowire junctionless gate-all-around MOSFET implemented in verilog-a for circuit simulation
B Smaani, SB Rahi, S Labiod
Silicon 14 (16), 10967-10976, 2022
162022
Analytical drain-current model and surface-potential calculation for junctionless cylindrical surrounding-gate MOSFETs
B Smaani, S Labiod, F Nafa, MS Benlatreche, S Latreche
Inter J Circ Syst Sig Proc 15, 1394-1399, 2021
52021
Numerical modeling of MOS transistor with interconnections using lumped element-FDTD method
S Labiod, S Latreche, C Gontrand
Microelectronics journal 43 (12), 995-1002, 2012
52012
Combined electromagnetic and drift diffusion models for microwave semiconductor device
S Labiod, S Latreche, M Bella, C Gontrand
Journal of Electromagnetic Analysis and Applications 3 (10), 423-429, 2011
52011
Device Circuit Co-design Issues in FETs
S Tayal, B Smaani, SB Rahi, S Labiod, Z Ramezani
CRC Press, 2023
42023
Mixed-mode optical/electric simulation of silicon lateral PIN photodiode using FDTD method
S Labiod, B Smaani, S Tayal, SB Rahi, H Sedrati, S Latreche
Silicon 15 (3), 1181-1191, 2023
42023
Compact modeling of junctionless gate-all-around MOSFET for circuit simulation: Scope and challenges
B Smaani, F Nafa, AK Upadhyay, S Labiod, SB Rahi, MS Benlatreche, ...
Device Circuit Co-Design Issues in FETs, 57-78, 2024
22024
Effect of substrate temperature on physical properties of Co doped SnS2 thin films deposited by ultrasonic spray pyrolysis.
Z Hadef, K Kamli, O Kamli, S Labiod
Chalcogenide Letters 20 (8), 2023
22023
Electrical modelling of Through Silicon Vias (TSVs) and their impact on a CMOS circuit: Ring oscillator
MA Benkechkache, S Latreche, S Labiod, GF Dalla Betta, L Pancheri
2017 International Conference on Electrical and Information Technologies …, 2017
22017
Contribution à l’étude de perturbations électromagnétiques sur des composants MOS en Utilisant la méthode FDTD
S Labiod, S Latreche
Université Frères Mentouri-Constantine 1, 2013
22013
Insights into Three-Dimensional Radiofrequency Circuits Connections
R Dahmani, O Valorge, F Sun, S Labiod, F Calmon, S Latreche, ...
Computer Technology and Application 2, 456, 2011
22011
Effect of deposition time on the properties of CuxZnyS thin films synthesized by ultrasonic spray pyrolysis
K Kamli, Z Hadef, O Kamli, B Chouial, MS Aida, H Hadjoudja, S Labiod
Journal of Nano Research 81, 37-52, 2023
12023
Numerical modeling of electrical/optical combination for the simulation of PIN photodiode
S Labiod, B Smaani, S Latreche
2022 19th International Multi-Conference on Systems, Signals & Devices (SSD …, 2022
12022
Mixed-Mode Device Modeling of DGMOS RF Oscillators
M Bella, S Latreche, S Labiod, C Gontrand
Circuits and Systems 2014, 2014
12014
Numerical modeling of MOS transistor using implicit finite different-time domain method
S Labiod, S Latreche, B Smali, MR Beghoul, C Gontrand
2012 24th International Conference on Microelectronics (ICM), 1-4, 2012
12012
Markov Chain Approach of Digital Flow Disturbances on Supplies via Heterogeneous Integrated Circuit Substrate
C Gontrand, JCN Perez, PJ Viverge, F Calmon, S Labiod, S Latreche, ...
International Journal of Modelling and Simulation 30 (2), 186-195, 2010
12010
Junctionless FET for Bio-Sensing Applications
B Smaani, S Labiod, MS Benlatreche
Nanoelectronics, Nanophotonics, Quantum And Emerging Technologies 68, 101, 2024
2024
Temperature Effect Assessment on the Gate-All-Around Junctionless FET for Bio-Sensing Applications
B Smaani, S Labiod, MS Benlatreche, B Mehimmedetsi, R Yadav, ...
International Journal of High Speed Electronics and Systems 33 (02n03), 2440061, 2024
2024
Mathematical Approach for a Future Semiconductor Roadmap
SB Rahi, AK Upadhyay, YS Song, N Sahni, R Yadav, UC Bind, G Naima, ...
Negative Capacitance Field Effect Transistors, 114-126, 2023
2023
Conventional CMOS circuit design
S Labiod, A Mouatsi, Z Hadef, B Smaani
Device Circuit Co-Design Issues in FETs, 21-56, 2023
2023
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Artikler 1–20