| Dyser: Unifying functionality and parallelism specialization for energy-efficient computing V Govindaraju, CH Ho, T Nowatzki, J Chhugani, N Satish, ... IEEE Micro 32 (5), 38-51, 2012 | 327 | 2012 |
| Stream-dataflow acceleration T Nowatzki, V Gangadhar, N Ardalani, K Sankaralingam Proceedings of the 44th Annual International Symposium on Computer …, 2017 | 227 | 2017 |
| Dsagen: Synthesizing programmable spatial accelerators J Weng, S Liu, V Dadu, Z Wang, P Shah, T Nowatzki 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 152* | 2020 |
| A general constraint-centric scheduling framework for spatial architectures T Nowatzki, M Sartin-Tarm, L De Carli, K Sankaralingam, C Estan, ... ACM SIGPLAN Notices 48 (6), 495-506, 2013 | 120 | 2013 |
| Towards general purpose acceleration by exploiting common data-dependence forms V Dadu, J Weng, S Liu, T Nowatzki Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 109 | 2019 |
| Hardware acceleration of sparse and irregular tensor computations of ml models: A survey and insights S Dave, R Baghdadi, T Nowatzki, S Avancha, A Shrivastava, B Li Proceedings of the IEEE 109 (10), 1706-1752, 2021 | 102 | 2021 |
| Exploring the potential of heterogeneous von neumann/dataflow execution models T Nowatzki, V Gangadhar, K Sankaralingam Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 93 | 2015 |
| A hybrid systolic-dataflow architecture for inductive matrix algorithms J Weng, S Liu, Z Wang, V Dadu, T Nowatzki 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 83 | 2020 |
| Pushing the limits of accelerator efficiency while retaining programmability T Nowatzki, V Gangadhan, K Sankaralingam, G Wright 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 80 | 2016 |
| PolyGraph: Exposing the Value of Flexibility for Graph Processing Accelerators V Dadu, S Liu, T Nowatzki 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 73 | 2021 |
| Design, integration and implementation of the DySER hardware accelerator into OpenSPARC J Benson, R Cofell, C Frericks, CH Ho, V Govindaraju, T Nowatzki, ... IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012 | 72 | 2012 |
| Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign T Nowatzki, N Ardalani, K Sankaralingam, J Weng Proceedings of the 27th International Conference on Parallel Architectures …, 2018 | 59 | 2018 |
| Stream-based memory access specialization for general purpose processors Z Wang, T Nowatzki Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 56 | 2019 |
| Architectural simulators considered harmful T Nowatzki, J Menon, CH Ho, K Sankaralingam IEEE Micro 35 (6), 4-12, 2015 | 55 | 2015 |
| Riptide: A programmable, energy-minimal dataflow compiler and architecture G Gobieski, S Ghosh, M Heule, T Mowry, T Nowatzki, N Beckmann, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 546-564, 2022 | 51 | 2022 |
| Optimization and mathematical modeling in computer architecture T Nowatzki, MC Ferris, K Sankaralingam, C Estan, N Vaish, DA Wood Morgan & Claypool, 2014 | 46 | 2014 |
| μir-an intermediate representation for transforming and optimizing the microarchitecture of application accelerators A Sharifian, R Hojabr, N Rahimi, S Liu, A Guha, T Nowatzki, A Shriraman Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 42 | 2019 |
| Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG V Govindaraju, T Nowatzki, K Sankaralingam Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 42* | 2013 |
| Computer with hybrid Von-Neumann/dataflow execution architecture A Nowatzki, V Gangadhar, K Sankaralingam US Patent 10,216,693, 2019 | 41 | 2019 |
| Kickstarting semiconductor innovation with open source hardware G Gupta, T Nowatzki, V Gangadhar, K Sankaralingam Computer 50 (6), 50-59, 2017 | 40* | 2017 |
Karthikeyan SankaralingamProfessor of Computer Science, University of Wisconsin-MadisonZweryfikowany adres z cs.wisc.edu