| Wear Unleveling: Improving {NAND} Flash Lifetime by Balancing Page Endurance X Jimenez, D Novo, P Ienne 12th USENIX Conference on File and Storage Technologies (FAST 14), 47-59, 2014 | 143 | 2014 |
| Sleuth: Automated verification of software power analysis countermeasures AG Bayrak, F Regazzoni, D Novo, P Ienne Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013 | 99 | 2013 |
| Hardware system synthesis from domain-specific languages N George, HJ Lee, D Novo, T Rompf, KJ Brown, AK Sujeeth, M Odersky, ... 2014 24th International Conference on Field Programmable Logic and …, 2014 | 92 | 2014 |
| Selective spanning with fast enumeration: A near maximum-likelihood MIMO detector designed for parallel programmable baseband architectures M Li, B Bougard, EE Lopez, A Bourdoux, D Novo, L Van Der Perre, ... 2008 IEEE International Conference on Communications, 737-741, 2008 | 66 | 2008 |
| Automatic application of power analysis countermeasures AG Bayrak, F Regazzoni, D Novo, P Brisk, FX Standaert, P Ienne IEEE Transactions on Computers 64 (2), 329-341, 2013 | 61 | 2013 |
| Full-system simulation of big. little multicore architecture for performance and energy exploration A Butko, F Bruguier, A Gamatié, G Sassatelli, D Novo, L Torres, M Robert 2016 IEEE 10th international symposium on embedded multicore/many-core …, 2016 | 59 | 2016 |
| Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones H Parandeh-Afshar, H Benbihi, D Novo, P Ienne Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012 | 56 | 2012 |
| A 200Mbps+ 2.14 nJ/b digital baseband multi processor system-on-chip for SDRs V Derudder, B Bougard, A Couvreur, A Dewilde, S Dupont, L Folens, ... 2009 Symposium on VLSI Circuits, 292-293, 2009 | 56 | 2009 |
| A coarse-grained array based baseband processor for 100mbps+ software defined radio B Bougard, B De Sutter, S Rabou, D Novo, O Allam, S Dupont, ... Proceedings of the conference on Design, automation and test in Europe, 716-721, 2008 | 53 | 2008 |
| Retraining-based timing error mitigation for hardware neural networks J Deng, Y Fang, Z Du, Y Wang, H Li, O Temam, P Ienne, D Novo, X Li, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 593-596, 2015 | 43 | 2015 |
| Selective flexibility: Creating domain-specific reconfigurable arrays M Stojilović, D Novo, L Saranovac, P Brisk, P Ienne IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 40 | 2013 |
| Revisiting and-inverter cones G Zgheib, L Yang, Z Huang, D Novo, H Parandeh-Afshar, H Yang, ... Proceedings of the 2014 ACM/SIGDA international symposium on Field …, 2014 | 38 | 2014 |
| Sibyl: Adaptive and extensible data placement in hybrid storage systems using online reinforcement learning G Singh, R Nadig, J Park, R Bera, N Hajinazar, D Novo, J Gómez-Luna, ... Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 36 | 2022 |
| Mapping a multiple antenna SDM-OFDM receiver on the ADRES coarse-grained reconfigurable processor D Novo, W Moffat, V Derudder, B Bougard IEEE Workshop on Signal Processing Systems Design and Implementation, 2005 …, 2005 | 34 | 2005 |
| Optimizing near-ML MIMO detector for SDR baseband on parallel programmable architectures M Li, B Bougard, W Xu, D Novo, L Van Der Perre, F Catthoor Proceedings of the conference on Design, automation and test in Europe, 444-449, 2008 | 32 | 2008 |
| Flash-Cosmos: In-flash bulk bitwise operations using inherent computation capability of nand flash memory J Park, R Azizi, GF Oliveira, M Sadrosadati, R Nadig, D Novo, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 937-955, 2022 | 30 | 2022 |
| Design space exploration of LDPC decoders using high-level synthesis J Andrade, N George, K Karras, D Novo, F Pratas, L Sousa, P Ienne, ... IEEE Access 5, 14600-14615, 2017 | 30 | 2017 |
| Phoenix: Reviving MLC blocks as SLC to extend NAND flash devices lifetime X Jimenez, D Novo, P Ienne 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 226-229, 2013 | 30 | 2013 |
| Making domain-specific hardware synthesis tools cost-efficient N George, D Novo, T Rompf, M Odersky, P Ienne 2013 International Conference on Field-Programmable Technology (FPT), 120-127, 2013 | 29 | 2013 |
| Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case G Falcao, M Owaida, D Novo, M Purnaprajna, N Bellas, CD Antonopoulos, ... 2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012 | 29 | 2012 |
Paolo IenneProfessor, EPFLZweryfikowany adres z epfl.ch
