| A new circuit-level technique for leakage and short-circuit power reduction of static logic gates in 22-nm CMOS technology M Moradinezhad Maryan, M Amini-Valashani, SJ Azhari Circuits, Systems, and Signal Processing 40 (7), 3536-3560, 2021 | 28 | 2021 |
| A MOS translinear cell-based configurable block for current-mode analog signal processing MM Maryan, SJ Azhari Analog Integrated Circuits and Signal Processing 92, 1-13, 2017 | 27 | 2017 |
| Low-power high-speed analog multiplier/divider based on a new current squarer circuit MM Maryan, A Ghanaatian, SJ Azhari, A Abrishamifar Arabian Journal for Science and Engineering 43, 2909-2918, 2018 | 23 | 2018 |
| Low power FGMOS-based four-quadrant current multiplier circuits MM Maryan, SJ Azhari, A Ghanaatian Analog Integrated Circuits and Signal Processing 95, 115-125, 2018 | 18 | 2018 |
| A high-precision current-mode multifunction analog cell suitable for computational signal processing MM Maryan, RR Siahrood, SJ Azhari, A Rahmati Integration 70, 80-89, 2020 | 13 | 2020 |
| CMOS design of computational current-mode static and dynamic functions based on analog translinear cell MM Maryan, SJ Azhari Computers & Electrical Engineering 68, 629-645, 2018 | 13 | 2018 |
| Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions MM Maryan, SJ Azhari Microelectronics Journal 64, 99-105, 2017 | 9 | 2017 |
| A simple low-power high-speed CMOS four-quadrant current multiplier MM Maryan, SJ Azhari, MR Hajipour 2016 24th Iranian Conference on Electrical Engineering (ICEE), 1471-1474, 2016 | 8 | 2016 |
| 0.8‐V 1.4‐nW multi‐decade frequency range true RMS to DC converter based on two‐quadrant current squarer circuit MM Maryan, SJ Azhari, A Ayatollahi, H Sajadinia IET Science, Measurement & Technology 14 (1), 17-25, 2020 | 6 | 2020 |
| A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22ánm CMOS process MM Maryan, SJ Azhari, M Amini-Valashani Integration 87, 1-10, 2022 | 4 | 2022 |
| An input controlled leakage restrainer transistor‐based technique for leakage and short‐circuit power reduction of 1‐bit hybrid full adders M Moradinezhad Maryan, M Amini‐Valashani, SJ Azhari International Journal of Circuit Theory and Applications 49 (8), 2382-2395, 2021 | 3 | 2021 |
| A High Linear Full-Wave Rectifier Based on Current Squarer Cell Using FGMOS Transistors MM Maryan, H Sajadinia, RR Siahrood, SJ Azhari 2020 28th Iranian Conference on Electrical Engineering (ICEE), 1-5, 2020 | 3 | 2020 |
| Sub-threshold MOS translinear principle based-analog cell suitable for current-mode signal processing MM Maryan, RR Siahrood, H Sajadinia, SJ Azhari 2019 27th iranian conference on electrical engineering (icee), 60-65, 2019 | 3 | 2019 |
| A High Precision Low Distortion Current Squarer/Divider Circuit Based on FGMOS Translinear Principle MM Maryan, H Sajadinia, SJ Azhari 2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI …, 2019 | 3 | 2019 |
| An up-down topology based-current mode adjustable-gain square-rooting/geometric-mean circuit MM Maryan, SJ Azhari, A Ghanaatian Analog Integrated Circuits and Signal Processing 102, 283-291, 2020 | 2 | 2020 |
| Low-Leakage Double-Body MOSFET: A Promising Circuit-Level Technique for Deep-Submicron Analog Integrated Circuit Design MM Maryan, SJ Azhari Journal of Circuits, Systems and Computers 33 (08), 2450142, 2024 | 1 | 2024 |
| Compact design of high-speed low-error four-quadrant current multiplier with reduced power dissipation MM Maryan, SJ Azhari, M Ayat, RR Siahrood Journal of Circuits, Systems and Computers 29 (03), 2050038, 2020 | 1 | 2020 |
| A FGMOS-based four-quadrant current multiplier with reduced power dissipation MM Maryan, SJ Azhari, MR Hajipour, A Kamyar Int. Conference on New Research Achievements in Electrical and Computer …, 2016 | 1 | 2016 |
| A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process M Moradinezhad Maryan, SJ Azhari, M Amini-Valashani | | 2022 |
| A circuit-level methodology for leakage power reduction of high-efficient compressors in 22-nm CMOS technology MM Maryan, SJ Azhari, M Amini-Valashani Analog Integrated Circuits and Signal Processing 110 (3), 569-581, 2022 | | 2022 |
seyed javad azhariIran University of Science and TechnologyZweryfikowany adres z iust.ac.ir
