High-speed hybrid multiplier design using a hybrid adder with FPGA implementation V Thamizharasan, N Kasthuri IETE Journal of Research 69 (5), 2301-2309, 2023 | 25 | 2023 |
FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier V Thamizharasan, N Kasthuri International Journal of Electronics 110 (4), 587-607, 2023 | 19 | 2023 |
An efficient VLSI architecture for FIR filter using computation sharing multiplier V Thamizharasan, V Parthipan International Journal of Computer Applications 54 (14), 2012 | 11 | 2012 |
Design of proficient two operand adder using hybrid carry select adder with FPGA implementation V Thamizharasan, N Kasthuri IETE Journal of Research 69 (12), 9152-9165, 2023 | 8 | 2023 |
FPGA implementation of proficient Vedic multiplier architecture using hybrid carry select adder V Thamizharasan, N Kasthuri International Journal of Electronics 111 (8), 1253-1265, 2024 | 2 | 2024 |
Design of efficient binary multiplier architecture using hybrid compressor with FPGA implementation V Thamizharasan, V Parthipan Scientific Reports 14 (1), 8492, 2024 | 2 | 2024 |
RETRACTED: Adaptive Beam forming algorithms for wireless Communication using LABVIEW M Ramya, V Thamizharasan, V Parthipan IOP Conference Series: Materials Science and Engineering 1084 (1), 012046, 2021 | 1 | 2021 |
Proficient Architecture for Vedic Multiplier using Various VLSI Design Techniques of Optimized Adder V Thamizharasan, M Gokulapriya, M Madhubala, T Divya, N Ramya | | 2024 |
Performance Analysis of Power Gating designs in Low Power VLSI Circuits JN V Thamizharasan International Journal of Innovative Research in Electrical, Electronics …, 2023 | | 2023 |
DESIGN AND ANALYSIS OF WALLACE TREE MULTIPLIER USING APPROXIMATE FULL ADDER AND KOGGE STONE ADDER PP V Thamizharasan International Journal of Innovative Research in Electrical, Electronics …, 2023 | | 2023 |
A Generalized Scalar Pwm Approach for Three-phase Voltage-source Inverter Fed Ac Drive V THAMIZHARASAN, M KARTHIKKUMAR | | 2023 |
Solar Powered Autonomous Robotic Car Using for Surveillance V Premchandran, M Karthikkumar, V Thamizharasan, E Sathish Intelligent Manufacturing and Energy Sustainability: Proceedings of ICIMES …, 2021 | | 2021 |
A Review on Image Enhancement Techniques using Modified Approach of Histogram Equalization V Premchandran, P Logamurthy, M Karthikkumar, V Thamizharasan, ... | | 2020 |
A Novel Technique to Preserve Nourishment of Food Beverages using E-Nose Technology in Food Industry MKVTM Ramya, GLDV Premchandran | | 2020 |
Investigation on Power, Delay and Area optimization of XOR Gate MR V.Thamizharasan WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS 19 (32), 297-304, 2020 | | 2020 |
AN EFFFICIENT VLSI ARCHITECTURE OF FIXED-POINT LMS ADAPTIVE FILTER FOR DSP APPLICATION V Thamizharasan International Journal of Advanced Research in Management, Architecture …, 2017 | | 2017 |
Efficacious Convolution and Deconvolution VLSI Architecture for Productiveness DSP Applications RKS Thamizharasan .V International Journal for Science and Advance Research In Technology 2 (9 …, 2016 | | 2016 |
DWT/IDWT processor for power line communication system R Kalaivani, V Thamizharasan | | 2012 |
Design of E cient Binary Multiplier Architecture using Hybrid Compressor with FPGA implementation V Thamizharasan, V Parthipan | | |