| Analysis and Design of Novel Doping Free Silicon Nanotube TFET with High-density Meshing Using ML for Sub Nanometre Technology Nodes R Kumar, BA Devi, V Sireesha, AK Reddy, I Hariharan, E Konguvel, ... Silicon, 1-8, 2022 | 11 | 2022 |
| Hardware implementation of approximate multipliers for signal processing applications E Konguvel, I Hariharan, R Sujatha, M Kannan International Journal of Wireless and Mobile Computing 23 (3-4), 302-309, 2022 | 4 | 2022 |
| Algorithms for reducing reconfiguration overheads using prefetch, reuse, and optimal mapping of tasks I Hariharan, M Kannan Concurrency and Computation: Practice and Experience 33 (7), 1-1, 2021 | 4 | 2021 |
| Reducing reconfiguration overheads of a reconfigurable dynamic system using active run-time prediction I Hariharan, M Kannan J Electr Eng 18 (2), 349-356, 2018 | 4 | 2018 |
| Efficient Use of On-Chip Memories and Scheduling Techniques to Eliminate the Reconfiguration Overheads in Reconfigurable Systems I Hariharan, M Kannan Journal of Circuits, Systems and Computers 28 (14), 1950246, 2019 | 2 | 2019 |
| Reducing reconfiguration overheads using configuration prefetch, optimal reuse, and optimal memory mapping I Hariharan, M Kannan National Academy Science Letters 43 (1), 27-31, 2020 | 1 | 2020 |
kannan MProfessor, Department of Electronics Engineering,MIT Campus, Anna University, Chennai, Tamil NaduZweryfikowany adres z annauniv.edu