José F. Martínez

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	Wszystkie	Od 2020
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i10-indeks	38	24

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Engin IpekDistinguished Member of Technical Staff, MicronZweryfikowany adres z cs.rochester.edu
Josep TorrellasProfessor of Computer Science, University of Illinois Urbana-ChampaignZweryfikowany adres z illinois.edu
Jian LiFuturewei, IBM Research, Cornell University, University of Rhode Island, Tsinghua UniversityZweryfikowany adres z futurewei.com
Shuang ChenArchitect, Huawei CloudZweryfikowany adres z huawei.com
Onur MutluETH Zürich and Carnegie Mellon UniversityZweryfikowany adres z inf.ethz.ch
Alyssa ApselCornell UniversityZweryfikowany adres z cornell.edu
Christina DelimitrouAssistant Professor, Massachusetts Institute of TechnologyZweryfikowany adres z mit.edu
Rich CaruanaMicrosoft ResearchZweryfikowany adres z microsoft.com
Rajeev Kumar DokaniaKepler/Intel/CornellZweryfikowany adres z cornell.edu
Matthew WatkinsLafayette CollegeZweryfikowany adres z lafayette.edu
Michael HuangUniversity of RochesterZweryfikowany adres z rochester.edu
Skand HurkatMicrosoftZweryfikowany adres z microsoft.com
Xiaodong WangResearch Scientist, Facebook Inc.Zweryfikowany adres z cornell.edu
Milos PrvulovicProfessor of Computer Science, Georgia TechZweryfikowany adres z cc.gatech.edu
Jose RenauProcessor of Computer Science Engineering, UCSCZweryfikowany adres z ucsc.edu
Marcelo CintraHead of Scientific Computing at CAESAR and Honorary Professor at University of EdinburghZweryfikowany adres z caesar.de
Mateo ValeroProfessor at UPC and director of the Barcelona Supercomputing CenterZweryfikowany adres z bsc.es
Adrian CristalBarcelona Supercomputing Center - CSIC (IIIA) - UPCZweryfikowany adres z bsc.es
Saugata GhoseUniversity of Illinois Urbana-ChampaignZweryfikowany adres z illinois.edu
Eriko NurvitadhiMangoBoostZweryfikowany adres z mangoboost.io

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José F. Martínez

Lee Teng-hui Professor of Engineering at Cornell University

Zweryfikowany adres z cornell.edu - Strona główna

Computer Architecture Hardware Processor Design Memory Systems


Tytuł Sortuj wg cytatów Sortuj wg roku Sortuj wg tytułu	Cytowane przez Cytowane przez	Rok
Self-optimizing memory controllers: A reinforcement learning approach E Ipek, O Mutlu, JF Martínez, R Caruana Intl. Symp. on Computer Architecture (ISCA), 2008	656	2008
Core Fusion: Accommodating software diversity in chip multiprocessors E Ipek, M Kirman, N Kirman, JF Martínez Intl. Symp. on Computer Architecture (ISCA), 2007	407	2007
Leveraging optical technology in future bus-based chip multiprocessors N Kirman, M Kirman, RK Dokania, JF Martínez, AB Apsel, MA Watkins, ... Intl. Symp. on Microarchitecture (MICRO), 2006	405	2006
Dynamic power-performance adaptation of parallel computation on chip multiprocessors J Li, JF Martínez Intl. Symp. on High Performance Computer Architecture (HPCA), 2006	373	2006
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach R Bitirgen, E Ipek, JF Martínez Intl. Symp. on Microarchitecture (MICRO), 2008	372	2008
PARTIES: QoS-aware resource partitioning for multiple interactive services S Chen, C Delimitrou, JF Martínez Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2019	355	2019
Cherry: Checkpointed early resource recycling in out-of-order microprocessors JF Martínez, J Renau, MC Huang, M Prvulovic, J Torrellas Intl. Symp. on Microarchitecture (MICRO), 2002	307	2002
Architectural support for scalable speculative parallelization in shared-memory multiprocessors M Cintra, JF Martínez, J Torrellas Intl. Symp. on Computer Architecture (ISCA), 2000	290	2000
Speculative synchronization: Applying thread-level speculation to explicitly parallel applications JF Martínez, J Torrellas Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2002	280	2002
The thrifty barrier: Energy-aware synchronization in shared-memory multiprocessors J Li, JF Martínez, MC Huang Intl. Symp. on High Performance Computer Architecture (HPCA), 2004	198	2004
Utilizing dynamically coupled cores to form a resilient chip multiprocessor C LaFrieda, E Ipek, JF Martínez, R Manohar Intl. Conf. on Dependable Systems and Networks (DSN), 2007	192	2007
GraphGen: An FPGA framework for vertex-centric graph computation E Nurvitadhi, G Weisz, Y Wang, S Hurkat, M Nguyen, JC Hoe, JF Martínez, ... Intl. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2014	166	2014
Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems J Mukundan, H Hunter, K Kim, J Stuecheli, JF Martínez Intl. Symp. on Computer Architecture (ISCA), 2013	138	2013
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing N Kirman, JF Martínez Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2010	131	2010
Checkpointed early load retirement N Kirman, M Kirman, M Chaudhuri, JF Martínez Intl. Symp. on High Performance Computer Architecture (HPCA), 2005	125	2005
Dynamic multicore resource management: A machine learning approach JF Martínez, E Ipek IEEE Micro 29 (5), 8-17, 2009	113	2009
Power-performance considerations of parallel computing on chip multiprocessors J Li, JF Martínez ACM Trans. on Architecture and Code Optimization (TACO) 2 (4), 397-422, 2005	111	2005
Toward kilo-instruction processors A Cristal, OJ Santana, M Valero, JF Martínez ACM Trans. on Architecture and Code Optimization (TACO) 1 (4), 389-417, 2004	111	2004
Improving memory scheduling via processor-side load criticality information S Ghose, H Lee, JF Martínez Intl. Symp. on Computer Architecture (ISCA), 2013	105	2013
Power-performance implications of thread-level parallelism on chip multiprocessors J Li, JF Martínez Intl. Symp. on Performance Analysis of Systems and Software (ISPASS), 2005	95	2005

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