GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning H Wang, K Wang, J Yang, L Shen, N Sun, HS Lee, S Han
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
302 2020 An energy-efficient comparator with dynamic floating inverter amplifier X Tang, L Shen, B Kasap, X Yang, W Shi, A Mukherjee, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 55 (4), 1011-1022, 2020
230 2020 Palm NMR and 1-chip NMR N Sun, TJ Yoon, H Lee, W Andress, R Weissleder, D Ham
IEEE Journal of Solid-State Circuits 46 (1), 342-352, 2010
168 2010 CMOS RF biosensor utilizing nuclear magnetic resonance N Sun, Y Liu, H Lee, R Weissleder, D Ham
IEEE Journal of Solid-State Circuits 44 (5), 1629-1643, 2009
144 2009 15.2 A 2.75-to-75.9 TOPS/W computing-in-memory NN processor supporting set-associate block-wise zero skipping and ping-pong CIM with simultaneous computation and weight updating J Yue, X Feng, Y He, Y Huang, Y Wang, Z Yuan, M Zhan, J Liu, JW Su, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 238-240, 2021
138 2021 Scalable NMR spectroscopy with semiconductor chips D Ha, J Paulsen, N Sun, YQ Song, D Ham
Proceedings of the National Academy of Sciences 111 (33), 11955-11960, 2014
132 2014 SAR ADC architecture with 98% reduction in switching energy over conventional scheme A Sanyal, N Sun
Electronics Letters 49 (4), 248-250, 2013
131 2013 A 13-ENOB second-order noise-shaping SAR ADC realizing optimized NTF zeros using the error-feedback structure S Li, B Qiao, M Gandara, DZ Pan, N Sun
IEEE Journal of Solid-State Circuits 53 (12), 3484-3496, 2018
125 2018 A 12b-ENOB 61µW noise-shaping SAR ADC with a passive integrator W Guo, N Sun
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 405-408, 2016
123 2016 A second-order noise-shaping SAR ADC with passive integrator and tri-level voting H Zhuang, W Guo, J Liu, H Tang, Z Zhu, L Chen, N Sun
IEEE Journal of Solid-State Circuits 54 (6), 1636-1647, 2019
118 2019 A 1-V 0.25- L Shen, N Lu, N Sun
IEEE Journal of Solid-State Circuits 53 (3), 896-905, 2018
116 2018 Modular and reconfigurable wireless e‐tattoos for personalized sensing H Jeong, L Wang, T Ha, R Mitbander, X Yang, Z Dai, S Qiao, L Shen, ...
Advanced Materials Technologies 4 (8), 1900117, 2019
113 2019 A 0.7-V 0.6- L Chen, X Tang, A Sanyal, Y Yoon, J Cong, N Sun
IEEE Journal of Solid-State Circuits 52 (5), 1388-1398, 2017
109 2017 A 24-µW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique L Chen, A Sanyal, J Ma, N Sun
ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 219-222, 2014
104 2014 A 13.5-ENOB, 107-μW noise-shaping SAR ADC with PVT-robust closed-loop dynamic amplifier X Tang, X Yang, W Zhao, CK Hsu, J Liu, L Shen, A Mukherjee, W Shi, S Li, ...
IEEE Journal of Solid-State Circuits 55 (12), 3248-3259, 2020
103 2020 A Scaling-Friendly Low-Power Small-Area K Lee, Y Yoon, N Sun
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (4 …, 2015
92 2015 Strong subthreshold current array PUF with 265 challenge-response pairs resilient to machine learning attacks in 130nm CMOS X Xi, H Zhuang, N Sun, M Orshansky
2017 Symposium on VLSI Circuits, C268-C269, 2017
87 2017 MAGICAL: Toward fully automated analog IC layout leveraging human and machine intelligence B Xu, K Zhu, M Liu, Y Lin, S Li, X Tang, N Sun, DZ Pan
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
86 2019 GeniusRoute: A new analog routing paradigm using generative neural network guidance K Zhu, M Liu, Y Lin, B Xu, S Li, X Tang, N Sun, DZ Pan
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
83 2019 An efficient analog circuit sizing method based on machine learning assisted global optimization AF Budak, M Gandara, W Shi, DZ Pan, N Sun, B Liu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
82 2021 
Xiyuan TangPeking UniversityZweryfikowany adres z pku.edu.cn
