Chaitali Chakrabarti

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Trevor MudgeBredt Family Professor of Engineering, University of MichiganZweryfikowany adres z eecs.umich.edu
Yu CaoProfessor, University of MinnesotaZweryfikowany adres z umn.edu
David BlaauwProfessor of Electrical Engineering and Computer Science, University of MichiganZweryfikowany adres z umich.edu
Ronald DreslinskiUniversity of MichiganZweryfikowany adres z umich.edu
Scott MahlkeProfessor, Electrical Engineering and Computer Science Dept., University of MichiganZweryfikowany adres z umich.edu
Hyunseok LeeProfessor or Electronics and Comunications Engineering in Kwangwoon UniversityZweryfikowany adres z kw.ac.kr
Thomas F. WenischProf. of CSE, University of MichiganZweryfikowany adres z umich.edu
cheng'en YangArizona State UniversityZweryfikowany adres z intel.com
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State UniversityZweryfikowany adres z cse.psu.edu
Siyuan WeiArizona State UniversityZweryfikowany adres z asu.edu
Yunus EmreGoogle SW EngineerZweryfikowany adres z asu.edu
Krisztián FlautnerUtopiun LLCZweryfikowany adres z utopiun.com
Lanping DengArizona State UniversityZweryfikowany adres z asu.edu
Ali ManzakFlorida State UniversityZweryfikowany adres z fsu.edu
Naehyuck ChangSamsung Electronics Device Solutions AmericaZweryfikowany adres z ieee.org
Andreas SpaniasArizona State UniversityZweryfikowany adres z asu.edu
Lifeng MiaoArizona State UniversityZweryfikowany adres z asu.edu
Dennis SylvesterProfessor of Electrical Engineering and Computer Science, University of MichiganZweryfikowany adres z umich.edu
Mohit ShahArizona State UniversityZweryfikowany adres z asu.edu
Hsing-Min ChenIntel CorporationZweryfikowany adres z asu.edu

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Chaitali Chakrabarti

Professor of Electrical Engineering, SECEE, Arizona State University

Zweryfikowany adres z asu.edu - Strona główna

VLSI architectures for signal processing low power embedded systems


Tytuł Sortuj wg cytatów Sortuj wg roku Sortuj wg tytułu	Cytowane przez Cytowane przez	Rok
A VLSI architecture for lifting-based forward and inverse wavelet transform K Andra, C Chakrabarti, T Acharya IEEE transactions on signal processing 50 (4), 966-977, 2002	514	2002
SODA: A low-power architecture for software radio Y Lin, H Lee, M Woh, Y Harel, S Mahlke, T Mudge, C Chakrabarti, ... ACM SIGARCH Computer Architecture News 34 (2), 89-101, 2006	329	2006
Efficient realizations of the discrete and continuous wavelet transforms: From single chip implementations to mappings on SIMD array computers C Chakrabarti, M Vishwanath IEEE Transactions on signal processing 43 (3), 759-771, 1995	329	1995
Outerspace: An outer product based sparse matrix multiplication accelerator S Pal, J Beaumont, DH Park, A Amarnath, S Feng, C Chakrabarti, HS Kim, ... 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018	313	2018
Memory exploration for low power, embedded systems WT Shiue, C Chakrabarti Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 140-145, 1999	262	1999
Architectures for wavelet transforms: A survey C Chakrabarti, M Vishwanath, RM Owens Journal of VLSI signal processing systems for signal, image and video …, 1996	243	1996
A distributed canny edge detector: algorithm and FPGA implementation Q Xu, S Varadarajan, C Chakrabarti, LJ Karam IEEE Transactions on Image Processing 23 (7), 2944-2960, 2014	226	2014
A system level energy model and energy-quality evaluation for integrated transceiver front-ends Y Li, B Bakkaloglu, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (1), 90-103, 2007	202	2007
A survey on lifting-based discrete wavelet transform architectures T Acharya, C Chakrabarti Journal of VLSI signal processing systems for signal, image and video …, 2006	192	2006
A high-performance JPEG2000 architecture K Andra, C Chakrabarti, T Acharya IEEE Transactions on Circuits and Systems for video technology 13 (3), 209-218, 2003	189	2003
Energy-efficient dynamic task scheduling algorithms for DVS systems J Zhuo, C Chakrabarti ACM Transactions on Embedded Computing Systems (TECS) 7 (2), 1-25, 2008	139	2008
AnySP: anytime anywhere anyway signal processing M Woh, S Seo, S Mahlke, T Mudge, C Chakrabarti, K Flautner Proceedings of the 36th annual international symposium on Computer …, 2009	130	2009
SODA: A high-performance DSP architecture for software-defined radio Y Lin, H Lee, M Woh, Y Harel, S Mahlke, T Mudge, C Chakrabarti, ... IEEE micro 27 (1), 114-123, 2007	130	2007
From SODA to scotch: The evolution of a wireless baseband processor M Woh, Y Lin, S Seo, S Mahlke, T Mudge, C Chakrabarti, R Bruce, ... 2008 41st IEEE/ACM International Symposium on Microarchitecture, 152-163, 2008	128	2008
Product code schemes for error correction in MLC NAND flash memories C Yang, Y Emre, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (12 …, 2011	125	2011
A low power scheduling scheme with resources operating at multiple voltages A Manzak, C Chakrabarti IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10 (1), 6-14, 2002	119	2002
A super-pipelined energy efficient subthreshold 240 MS/s FFT core in 65 nm CMOS D Jeon, M Seok, C Chakrabarti, D Blaauw, D Sylvester IEEE Journal of Solid-State Circuits 47 (1), 23-34, 2011	116	2011
Low-power scheduling with resources operating at multiple voltages WT Shine, C Chakrabarti IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2000	114	2000
Static task-scheduling algorithms for battery-powered DVS systems P Chowdhury, C Chakrabarti IEEE transactions on very large scale integration (VLSI) systems 13 (2), 226-237, 2005	113	2005
Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition C Chakrabarti, J JaJa IEEE Transactions on Computers 39 (11), 1359-1368, 1990	113	1990

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