| Multi-voltage CMOS circuit design V Kursun, EG Friedman John Wiley & Sons, 2006 | 379 | 2006 |
| Characterization of a novel nine-transistor SRAM cell Z Liu, V Kursun IEEE transactions on very large scale integration (VLSI) systems 16 (4), 488-492, 2008 | 366 | 2008 |
| Dynamically tuning processor resources with adaptive processing DH Albonesi, R Balasubramonian, SG Dropsbo, S Dwarkadas, ... Computer 36 (12), 49-58, 2003 | 215 | 2003 |
| Low-voltage-swing monolithic dc-dc conversion V Kursun, SG Narendra, VK De, EG Friedman IEEE Transactions on Circuits and Systems II: Express Briefs 51 (5), 241-248, 2004 | 177 | 2004 |
| Domino logic with variable threshold voltage keeper V Kursun, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (6 …, 2003 | 161 | 2003 |
| Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor V Kursun, SG Narendra, VK De, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (3), 514-522, 2003 | 152 | 2003 |
| Reversed temperature-dependent propagation delay characteristics in nanometer CMOS circuits R Kumar, V Kursun IEEE Transactions on Circuits and Systems II: Express Briefs 53 (10), 1078-1082, 2006 | 139 | 2006 |
| Low power and robust 7T dual-Vt SRAM circuit SA Tawfik, V Kursun 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 1452-1455, 2008 | 130 | 2008 |
| Low-power and compact sequential circuits with independent-gate FinFETs SA Tawfik, V Kursun IEEE Transactions on electron devices 55 (1), 60-70, 2007 | 123 | 2007 |
| Managing static leakage energy in microprocessor functional units S Dropsho, V Kursun, DH Albonesi, S Dwarkadas, EG Friedman 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002 | 121 | 2002 |
| Sleep switch dual threshold voltage domino logic with reduced standby leakage current V Kursun, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (5), 485-496, 2004 | 111 | 2004 |
| Independent-gate and tied-gate FinFET SRAM circuits: Design guidelines for reduced area and enhanced stability SA Tawfik, Z Liu, V Kursun 2007 Internatonal Conference on Microelectronics, 171-174, 2007 | 91 | 2007 |
| Leakage power characteristics of dynamic circuits in nanometer CMOS technologies Z Liu, V Kursun IEEE Transactions on Circuits and Systems II: Express Briefs 53 (8), 692-696, 2006 | 89 | 2006 |
| Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation G Schrom, P Hazucha, JH Hahn, V Kursun, D Gardner, S Narendra, ... Proceedings of the 2004 international symposium on Low power electronics and …, 2004 | 87 | 2004 |
| Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies R Kumar, V Kursun 2006 IEEE International Symposium on Circuits and Systems, 4 pp., 2006 | 80 | 2006 |
| High read stability and low leakage cache memory cell Z Liu, V Kursun 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2774-2777, 2007 | 79 | 2007 |
| Ground-bouncing-noise-aware combinational MTCMOS circuits H Jiao, V Kursun IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 2053-2065, 2010 | 72 | 2010 |
| Efficiency analysis of a high frequency buck converter for on-chip integration with a dual -VDDmicroprocessor V Kursun, SG Narendra, VK De, EG Friedman Proceedings of the 28th European Solid-State Circuits Conference, 743-746, 2002 | 66 | 2002 |
| Monolithic DC-DC converter analysis and MOSFET gate voltage optimization V Kursun, SG Narendra, VK De, EG Friedman Fourth International Symposium on Quality Electronic Design, 2003 …, 2003 | 65 | 2003 |
| Low power and high speed multi threshold voltage interface circuits SA Tawfik, V Kursun IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (5), 638-645, 2009 | 63 | 2009 |
Eby G. FriedmanDistinguished Professor, University of RochesterAdresă de e-mail confirmată pe ece.rochester.edu
