| A review on performance comparison of advanced MOSFET structures below 45 nm technology node N Mendiratta, SL Tripathi Journal of Semiconductors 41 (6), 1-10, 2020 | 82 | 2020 |
| Machine learning algorithms for signal and image processing D Ghai, SL Tripathi, S Saxena, M Chanda, M Alazab John Wiley & Sons, 2022 | 64 | 2022 |
| 18nm n-channel and p-channel Dopingless asymmetrical Junctionless DG-MOSFET: low power CMOS based digital and memory applications N Mendiratta, SL Tripathi Silicon 14 (11), 6435-6446, 2022 | 44 | 2022 |
| A journey from bulk MOSFET to 3 nm and beyond A Samal, SL Tripathi, SK Mohapatra Transactions on Electrical and Electronic Materials 21 (5), 443-455, 2020 | 40 | 2020 |
| Low leakage pocket junction-less DGTFET with biosensing cavity region SL Tripathi, R Patel, VK Agrawal Turkish Journal of Electrical Engineering and Computer science 27 (4), 2466-2474, 2019 | 40 | 2019 |
| Internet of Things: Robotic and Drone Technology N Goyal, S Sharma, AK Rana, SL Tripathi CRC Press, 2022 | 38* | 2022 |
| Future of machine learning (ML) and deep learning (DL) in healthcare monitoring system K Kumar, K Chaudhury, SL Tripathi Machine learning algorithms for signal and image processing, 293-313, 2022 | 36 | 2022 |
| Design and Analysis of Heavily Doped n+ Pocket Asymmetrical Junction-Less Double Gate MOSFET for Biomedical Applications N Mendiratta, SL Tripathi, S Padmanaban, E Hossain Applied Sciences 10 (7), 2499, 2020 | 35 | 2020 |
| Multi-gate MOSFET structures with high-k dielectric materials SL Tripathi, R Mishra, RA Mishra J. Electron Devices 16, 1388-1394, 2012 | 35 | 2012 |
| Design of Low Power Si0.7Ge0.3 Pocket Junction-Less Tunnel FET Using Below 5 nm Technology SL Tripathi, GS Patel Wireless Personal Communications, 1-10, 2019 | 34 | 2019 |
| Characteristic comparison of connected DG FINFET, TG FINFET and Independent Gate FINFET on 32 nm technology SL Tripathi, R Mishra, RA Mishra 2012 2nd International Conference on Power, Control and Embedded Systems, 1-7, 2012 | 34 | 2012 |
| Performance Analysis of FinFET device Using Qualitative Approach for Low-Power applications S Verma, SL Tripathi, M Bassi 2019 Devices for Integrated Circuit (DevIC), 10.1109/DEVIC.2019.8783754, 2019 | 33 | 2019 |
| A boosted chimp optimizer for numerical and engineering design optimization challenges CL Kumari, VK Kamboj, SK Bath, SL Tripathi, M Khatri, S Sehgal Engineering with computers 39 (4), 2463-2514, 2023 | 31 | 2023 |
| Comprehensive analysis of 7T SRAM cell architectures with 18nm FinFET for low power bio-medical applications TS Kumar, SL Tripathi Silicon 14 (10), 5213-5224, 2022 | 31 | 2022 |
| Low-Power Efficient p+ Si0.7Ge0.3 Pocket Junctionless SGTFET with Varying Operating Conditions SL Tripathi, SK Sinha, GS Patel Journal of Electronic Materials 49 (7), 4291-4299, 2020 | 31 | 2020 |
| Leakage Reduction in 18 nm FinFET based 7T SRAM Cell using Self Controllable Voltage Level Technique TS Kumar, SL Tripathi Wireless Personal Communications, https://doi.org/10.1007/s11277-020-07765, 2020 | 28 | 2020 |
| SBOX under PVT variation A Kumar, SL Tripathi Analog Integr Circ Sig Process 105, 73-82, 2020 | 27* | 2020 |
| Artificial Intelligence for Internet of Things: Design Principle, Modernization, and Techniques N Thillaiarasu, SL Tripathi, V Dhinakaran CRC Press, 2022 | 26 | 2022 |
| Machine and deep‐learning techniques for text and speech processing DL Prasanna, SL Tripathi Machine learning algorithms for signal and image processing, 115-128, 2022 | 26 | 2022 |
| Sensors and their application K Kumar, A Sharma, SL Tripathi Electronic devices, circuits, and systems for biomedical applications, 177-195, 2021 | 23 | 2021 |
Dr. Sanjeet K SinhaProfessor, Lovely Professional University, Punjab, IndiaAdresă de e-mail confirmată pe lpu.co.in