| BRein memory: A single-chip binary/ternary reconfigurable in-memory deep neural network accelerator achieving 1.4 TOPS at 0.6 W K Ando, K Ueyoshi, K Orimo, H Yonekawa, S Sato, H Nakahara, ... IEEE Journal of Solid-State Circuits 53 (4), 983-994, 2017 | 188 | 2017 |
| BRein memory: A 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS K Ando, K Ueyoshi, K Orimo, H Yonekawa, S Sato, H Nakahara, M Ikebe, ... 2017 Symposium on VLSI Circuits, C24-C25, 2017 | 96 | 2017 |
| 60-GHz, 9-µW wake-up receiver for short-range wireless communications T Wada, M Ikebe, E Sano 2013 Proceedings of the ESSCIRC (ESSCIRC), 383-386, 2013 | 42 | 2013 |
| A wide-dynamic-range compression image sensor with negative-feedback resetting M Ikebe, K Saito IEEE Sensors Journal 7 (5), 897-904, 2007 | 37 | 2007 |
| Column parallel single-slope ADC with time to digital converter for CMOS imager M Shin, M Ikebe, J Motohisa, E Sano 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 29 | 2010 |
| An adaptive global and local tone mapping algorithm implemented on FPGA P Ambalathankandy, M Ikebe, T Yoshida, T Shimada, S Takamaeda, ... IEEE Transactions on Circuits and Systems for Video Technology 30 (9), 3015-3028, 2019 | 28 | 2019 |
| Local adaptive tone mapping with composite multiple gamma functions S Shimoyama, M Igarashi, M Ikebe, J Motohisa 2009 16th IEEE International Conference on Image Processing (ICIP), 3153-3156, 2009 | 25 | 2009 |
| 5.8 A 32× 32-Pixel 0.9 THz imager with pixel-parallel 12b VCO-based ADC in 0.18 μm CMOS S Yokoyama, M Ikebe, Y Kanazawa, T Ikegami, P Ambalathankandy, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 108-110, 2019 | 24 | 2019 |
| A time-division multiplexing Ising machine on FPGAs K Yamamoto, W Huang, S Takamaeda-Yamazaki, M Ikebe, T Asai, ... Proceedings of the 8th International Symposium on Highly Efficient …, 2017 | 24 | 2017 |
| Real-time tone mapping: a survey and cross-implementation hardware benchmark Y Ou, P Ambalathankandy, S Takamaeda, M Motomura, T Asai, M Ikebe IEEE Transactions on Circuits and Systems for Video Technology 32 (5), 2666-2686, 2021 | 22 | 2021 |
| A novel CMOS circuit for depressing synapse and its application to contrast-invariant pattern classification and synchrony detection Y Kanazawa, T Asai, M Ikebe, Y Amemiya International Journal of Robotics and Automation 19 (4), 206-212, 2004 | 21 | 2004 |
| Low-power wake-up receiver with subthreshold CMOS circuits for wireless sensor networks K Takahagi, H Matsushita, T Iida, M Ikebe, Y Amemiya, E Sano Analog Integrated Circuits and Signal Processing 75, 199-205, 2013 | 20 | 2013 |
| Cellular νMOS circuits performing edge detection with difference-of-Gaussian filters TST Sunayama, MIM Ikebe, TAT Asai, YAY Amemiya Japanese Journal of Applied Physics 39 (4S), 2278, 2000 | 20 | 2000 |
| A high performance and energy efficient microprocessor with a novel restricted dynamically reconfigurable accelerator I Hida, S Takamaeda-Yamazaki, M Ikebe, M Motomura, T Asai Circuits and Systems 8 (05), 134, 2017 | 17 | 2017 |
| A multithreaded CGRA for convolutional neural network processing K Ando, S Takamaeda-Yamazaki, M Ikebe, T Asai, M Motomura Circuits and Systems 8 (6), 149-170, 2017 | 16 | 2017 |
| Automatic radiographic quantification of joint space narrowing progression in rheumatoid arthritis using POC Y Ou, P Ambalathankandy, T Shimada, T Kamishima, M Ikebe 2019 IEEE 16th International Symposium on Biomedical Imaging (ISBI 2019 …, 2019 | 15 | 2019 |
| Integral A/D converter and CMOS image sensor M Ikebe US Patent 9,571,113, 2017 | 15 | 2017 |
| O (1) bilateral filtering with low memory usage M Igarashi, M Ikebe, S Shimoyama, K Yamano, J Motohisa 2010 IEEE International Conference on Image Processing, 3301-3304, 2010 | 15 | 2010 |
| Dither nn: An accurate neural network with dithering for low bit-precision hardware K Ando, K Ueyoshi, Y Oba, K Hirose, R Uematsu, T Kudo, M Ikebe, T Asai, ... 2018 International Conference on Field-Programmable Technology (FPT), 6-13, 2018 | 14 | 2018 |
| A 12-bit, 5.5-μW single-slope ADC using intermittent working TDC with multi-phase clock signals D Uchida, M Ikebe, J Motohisa, E Sano 2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014 | 14 | 2014 |
