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Mattia Cacciotti
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Exploiting errors for efficiency: A survey from circuits to applications
P Stanley-Marbell, A Alaghi, M Carbin, E Darulova, L Dolecek, ...
ACM Computing Surveys (CSUR) 53 (3), 1-39, 2020
892020
Design of approximate circuits by fabrication of false timing paths: The carry cut-back adder
V Camus, M Cacciotti, J Schlachter, C Enz
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018
302018
Combining structural and timing errors in overclocked inexact speculative adders
X Jiao, V Camus, M Cacciotti, Y Jiang, C Enz, RK Gupta
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
142017
Hardware acceleration of HDR-image tone mapping on an FPGA-CPU platform through high-level synthesis
M Cacciotti, V Camus, J Schlachter, A Pezzotta, C Enz
2018 31st IEEE International System-on-Chip Conference (SOCC), 158-162, 2018
102018
ASIC Design for Miniaturized Insect Eye-Inspired Image Processing System
M Cacciotti
EPFL, 2015
2015
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Статьи 1–5