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Tony Tae-Hyoung KIM
Tony Tae-Hyoung KIM
Associate Professor, Nanyang Technological University
Подтвержден адрес электронной почты в домене ntu.edu.sg - Главная страница
Название
Процитировано
Процитировано
Год
A scaling roadmap and performance evaluation of in-plane and perpendicular MTJ based STT-MRAMs for high-density cache memory
KC Chun, H Zhao, JD Harms, TH Kim, JP Wang, CH Kim
IEEE journal of solid-state circuits 48 (2), 598-610, 2012
4272012
Silicon odometer: An on-chip reliability monitor for measuring frequency degradation of digital circuits
TH Kim, R Persaud, CH Kim
IEEE Journal of Solid-State Circuits 43 (4), 874-880, 2008
3532008
A 0.2 V, 480 kb subthreshold SRAM with 1 k cells per bitline for ultra-low-voltage computing
TH Kim, J Liu, J Keane, CH Kim
IEEE Journal of Solid-State Circuits 43 (2), 518-529, 2008
2722008
A high-density subthreshold SRAM with data-independent bitline leakage and virtual ground replica scheme
TH Kim, J Liu, J Keane, CH Kim
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007
2112007
An on-chip NBTI sensor for measuring PMOS threshold voltage degradation
J Keane, TH Kim, CH Kim
Proceedings of the 2007 international symposium on Low power electronics and …, 2007
1842007
A Voltage Scalable 0.26 V, 64 kb 8T SRAM With V Lowering Techniques and Deep Sleep Mode
TH Kim, J Liu, CH Kim
Solid-State Circuits, IEEE Journal of 44 (6), 1785-1795, 2009
1792009
Utilizing reverse short channel effect for optimal subthreshold circuit design
TH Kim, H Eom, J Keane, C Kim
Proceedings of the 2006 international symposium on Low power electronics and …, 2006
1742006
Colonnade: A reconfigurable SRAM-based digital bit-serial compute-in-memory macro for processing neural networks
H Kim, T Yoo, TTH Kim, B Kim
IEEE Journal of Solid-State Circuits 56 (7), 2221-2233, 2021
1372021
A 16K current-based 8T SRAM compute-in-memory macro with decoupled read/write and 1-5bit column ADC
C Yu, T Yoo, TTH Kim, KCT Chuan, B Kim
2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020
1132020
Design of an ultra-low voltage 9T SRAM with equalized bitline leakage and CAM-assisted energy efficiency improvement
B Wang, TQ Nguyen, AT Do, J Zhou, M Je, TTH Kim
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (2), 441-448, 2014
1032014
An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS
TTH Kim
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (5), 607-611, 2018
842018
A multi-story power delivery technique for 3D integrated circuits
P Jain, TH Kim, J Keane, CH Kim
Proceedings of the 2008 international symposium on Low Power Electronics …, 2008
842008
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
J Keane, H Eom, TH Kim, S Sapatnekar, C Kim
Proceedings of the 43rd Annual Design Automation Conference, 425-428, 2006
832006
An 88% Efficiency 0.1–300-W Energy Harvesting System With 3-D MPPT Using Switch Width Modulation for IoT Smart Nodes
K Rawy, T Yoo, TTH Kim
IEEE Journal of Solid-State Circuits 53 (10), 2751-2762, 2018
782018
A logic-compatible eDRAM compute-in-memory with embedded ADCs for processing neural networks
C Yu, T Yoo, H Kim, TTH Kim, KCT Chuan, B Kim
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (2), 667-679, 2020
752020
A 65-nm 8T SRAM compute-in-memory macro with column ADCs for processing neural networks
C Yu, T Yoo, KTC Chai, TTH Kim, B Kim
IEEE Journal of Solid-State Circuits 57 (11), 3466-3476, 2022
722022
An 8T subthreshold SRAM cell utilizing reverse short channel effect for write margin and read performance improvement
TH Kim, J Liu, CH Kim
2007 IEEE Custom Integrated Circuits Conference, 241-244, 2007
672007
A 1-16b precision reconfigurable digital in-memory computing macro featuring column-MAC architecture and bit-serial computation
H Kim, Q Chen, T Yoo, TTH Kim, B Kim
ESSCIRC 2019-IEEE 45th European Solid State Circuits Conference (ESSCIRC …, 2019
612019
0.77 fJ/bit/search content addressable memory using small match line swing and automated background checking scheme for variation tolerance
AT Do, C Yin, K Velayudhan, ZC Lee, KS Yeo, TTH Kim
IEEE Journal of Solid-State Circuits 49 (7), 1487-1498, 2014
562014
An overview of processing-in-memory circuits for artificial intelligence and machine learning
D Kim, C Yu, S Xie, Y Chen, JY Kim, B Kim, JP Kulkarni, TTH Kim
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (2 …, 2022
552022
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