Подписаться
Abdulla Bataineh
Abdulla Bataineh
Подтвержден адрес электронной почты в домене just.edu.jo
Название
Процитировано
Процитировано
Год
Cray cascade: a scalable HPC system based on a Dragonfly network
G Faanes, A Bataineh, D Roweth, T Court, E Froese, B Alverson, ...
SC'12: Proceedings of the International Conference on High Performance …, 2012
2602012
The Cray BlackWidow: a highly scalable vector multiprocessor
D Abts, A Bataineh, S Scott, G Faanes, J Schwarzmeier, E Lundberg, ...
Proceedings of the 2007 ACM/IEEE conference on Supercomputing, 1-12, 2007
1002007
Hierarchical shared semaphore registers
A Bataineh, JR Kohn, EP Lundberg, TJ Johnson, GJ Faanes, SL Scott
US Patent App. 12/263,305, 2010
672010
Tom Court, Edwin Froese, Bob Alverson, Tim Johnson, Joe Kopnick, Mike Higgins, and James Reinhard. 2012. Cray Cascade: A Scalable HPC System Based on a Dragonfly Network
G Faanes, A Bataineh, D Roweth
Proceedings of the International Conference on High Performance Computing …, 2012
612012
Optimized high bandwidth cache coherence mechanism
SL Scott, A Bataineh
US Patent 7,082,500, 2006
602006
Balanced parallel sort on hypercube multiprocessors
B Abali, F Ozguner, A Bataineh
IEEE Transactions on Parallel and Distributed Systems 4 (5), 572-581, 1993
551993
System and method for facilitating tracer packets in a data-driven intelligent network
AM Ford, TJ Johnson, AM Bataineh
US Patent 12,034,633, 2024
352024
Fat tree adaptive routing
AM Bataineh, EL Froese
US Patent 11,973,685, 2024
352024
Increasingly minimal bias routing
A Bataineh, D Roweth
US Patent 9,577,918, 2017
262017
Multiprocessor computer cache coherence protocol
SL Scott, GJ Faanes, A Bataineh, M Bye, GA Schwoerer, DC Abts
US Patent App. 12/483,915, 2010
122010
Optimized adaptive routing to reduce number of hops
AM Bataineh, EL Froese, D Roweth
US Patent 11,757,764, 2023
92023
Load balanced sort on hypercube multiprocessors
B Abali, F Ozguner, A Bataineh
Proceedings of the Fifth Distributed Memory Computing Conference, 1990., 230-236, 1990
81990
Parallel logic and fault simulation algorithms for shared memory vector machines
Bataineh, Ozguner, Szauter
1992 IEEE/ACM International Conference on Computer-Aided Design, 369-372, 1992
61992
Parallel Boolean operations for information retrieval
A Bataineh, F Özgüner, A Sarwal
Information processing letters 39 (2), 99-108, 1991
51991
Configurable vector length computer processor
GJ Faanes, EP Lundberg, A Bataineh, TJ Johnson, M Parker, JR Kohn, ...
US Patent 8,601,236, 2013
32013
A parallel and vector implementation of circuit simulation on Cray supercomputers
A Bataineh, M Aamodt, K Thomas
PARALLEL ALGORITHMS AND APPLICATION 14 (2), 109-118, 1999
31999
Method and system for providing network egress fairness between applications
DC Hewson, TJ Johnson, AM Bataineh
US Patent 11,750,504, 2023
22023
Increasingly minimal bias routing
A Bataineh, D Roweth
Cray Inc. Seattle, WA (United States), 2017
22017
Electrical characterization of high-speed interconnects with a parallel three-dimensional finite-difference time-domain algorithm
A Bataineh, R Lee, F Özgüner
Simulation 64 (5), 289-295, 1995
21995
Parallel-and-vector implementation of the event-driven logic simulation algorithm on the Cray Y-MP supercomputer
A Bataineh, F Ozguner
Supercomputing'92: Proceedings of the 1992 ACM/IEEE Conference on …, 1992
21992
В данный момент система не может выполнить эту операцию. Повторите попытку позднее.
Статьи 1–20