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Karthik Rao
Karthik Rao
SoC Architect AMD Inc., Georgia Tech
Подтвержден адрес электронной почты в домене amd.com
Название
Процитировано
Процитировано
Год
Application-specific performance-aware energy optimization on android mobile devices
K Rao, J Wang, S Yalamanchili, Y Wardi, H Ye
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
592017
A ferroelectric FET based power-efficient architecture for data-intensive computing
Y Long, T Na, P Rastogi, K Rao, AI Khan, S Yalamanchili, ...
Proceedings of the International Conference on Computer-Aided Design, 1-8, 2018
302018
Tangram: Integrated control of heterogeneous computers
RP Pothukuchi, JL Greathouse, K Rao, C Erb, L Piga, PG Voulgaris, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
222019
Optimization of energy management of mobile devices based on specific user and device metrics uploaded to cloud
K Rao, J Wang, H Ye
US Patent App. 15/456,186, 2018
142018
Temperature Regulation in Multicore Processors Using Adjustable-Gain Integral Controllers
K Rao, W Song, S Yalamanchili, Y Wardi
IEEE Conference on Control Applications, 2015
112015
A research retrospective on amd's exascale computing journey
GH Loh, MJ Schulte, M Ignatowski, V Adhinarayanan, S Aga, D Aguren, ...
Proceedings of the 50th Annual International Symposium on Computer …, 2023
102023
Data convection: A gpu-driven case study for thermal-aware data placement in 3d drams
S Khadirsharbiyani, J Kotra, K Rao, M Kandemir
Proceedings of the ACM on Measurement and Analysis of Computing Systems 6 (1 …, 2022
82022
Application-Specific, Performance-Aware Energy Optimization
J Wang, K Rao, H Ye
US Patent App. 15/224,834, 2018
82018
An application-specific approach to energy optimization on android mobile devices
J Wang, K Rao, H Ye
IEEE Transactions on Mobile Computing 19 (7), 1492-1505, 2019
62019
Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs
JB Kotra, K Rao, JL Greathouse
US Patent 10,725,670, 2020
52020
Runtime localized cooling of high-performance processors
K Rao, W Huang, X An, M Arora, JL Greathouse
US Patent 11,137,809, 2021
22021
Setting Operating Points for Circuits in an Integrated Circuit Chip using an Integrated Voltage Regulator Power Loss Model
W Huang, M Rodriguez, K Rao
US Patent US20190296644A1, 2019
22019
Content-aware energy savings for video streaming and playback on mobile devices
Z Lin, J Wang, K Rao, C Tian, H Ye, Z Hu
US Patent 10,117,185, 2018
22018
Technique for improving power state transition latency for computing device
YI Donny, K Rao
US Patent App. 18/080,582, 2024
12024
Coordinated Management of the Processor and Memory for Optimizing Energy Efficiency
K Rao
Georgia Institute of Technology, 2018
12018
Low power state selection based on idle duration history
K Rao, I Paul, YI Donny, O Khodorkovsky, LPR Piga, W Choi, DG Lewis, ...
US Patent 12,130,692, 2024
2024
Operating voltage adjustment for aging circuits
S Sambamurthy, S Sundaram, I Paul, LD Hewitt, A Harwani, AJ Grenat, ...
US Patent App. 18/515,131, 2024
2024
Core selection based on usage policy and core constraints
LPR Piga, K Rao, I Paul, M Subramony, K Mitchell, DG Lewis, ...
US Patent 11,886,224, 2024
2024
Rest-of-chip power optimization through data fabric performance state management
K Rao, I Paul, DG Lewis, BDA Ramautarsingh, JKC Lui, P Loganaathan, ...
US Patent App. 17/855,054, 2024
2024
Techniques for reducing processor power consumption
AC Holla, AS Duenas, X Li, I Paul, K Rao
US Patent App. 17/854,858, 2024
2024
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