| TRACK: An algorithm for fault-tolerant, dynamic and scalable 2D mesh network-on-chip routing reconfiguration A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi Integration 72, 92-110, 2020 | 15 | 2020 |
| S2DIO: an extended scalable 2D mesh network-on-chip routing reconfiguration for efficient bypass of link failures A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi The Journal of Supercomputing 75, 6855-6881, 2019 | 8 | 2019 |
| Fault Tolerant Synthesis of Reversible Circuits A Jain arXiv preprint arXiv:1310.5231, 2013 | 6 | 2013 |
| An extended approach for online testing of reversible circuits A Jain, N Purohit, SC Jain IOSR Journals (IOSR Journal of Computer Engineering) 1 (16), 1-11, 2013 | 4 | 2013 |
| Towards implementation of fault tolerant reversible circuits A Jain, SC Jain 2013 1st International Conference on Emerging Trends and Applications in …, 2013 | 3 | 2013 |
| Performance-enhanced-LBDR for 2D mesh network-on-chip A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi International Symposium on VLSI Design and Test, 313-323, 2017 | 2 | 2017 |
| Fault Tolerant Synthesis of Reversible Circuits: A Designers Approach to Realize Fault Tolerant Reversible Circuits A Jain, SC Jain LAP LAMBERT Academic Publishing, 2015 | 2 | 2015 |
| An improved reconfiguration algorithm for handling 1-point NoC failures A Jain, V Laxmi, MS Gaur, A Sharma Microprocessors and Microsystems 101, 104910, 2023 | | 2023 |
