| Edge-host partitioning of deep neural networks with feature space encoding for resource-constrained internet-of-things platforms JH Ko, T Na, MF Amir, S Mukhopadhyay 2018 15th IEEE International Conference on Advanced Video and Signal Based …, 2018 | 199* | 2018 |
| ReRAM-based processing-in-memory architecture for recurrent neural network acceleration Y Long, T Na, S Mukhopadhyay IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (12 …, 2018 | 137 | 2018 |
| Pushing the limits of narrow precision inferencing at cloud scale with microsoft floating point B Darvish Rouhani, D Lo, R Zhao, M Liu, J Fowers, K Ovtcharov, ... Advances in neural information processing systems 33, 10271-10281, 2020 | 130 | 2020 |
| Cascade Adversarial Machine Learning Regularized with a Unified Embedding T Na, JH Ko, S Mukhopadhyay International Conference on Learning Representations (ICLR), 2018 | 123 | 2018 |
| A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme K Sohn, T Na, I Song, Y Shim, W Bae, S Kang, D Lee, H Jung, S Hyun, ... IEEE journal of solid-state circuits 48 (1), 168-177, 2012 | 82 | 2012 |
| Design of an energy-efficient accelerator for training of convolutional neural networks using frequency-domain computation JH Ko, B Mudassar, T Na, S Mukhopadhyay Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 79* | 2017 |
| 3-D stacked image sensor with deep neural network computation MF Amir, JH Ko, T Na, D Kim, S Mukhopadhyay IEEE Sensors Journal 18 (10), 4187-4199, 2018 | 76 | 2018 |
| Adaptive weight compression for memory-efficient neural networks JH Ko, D Kim, T Na, J Kung, S Mukhopadhyay Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 52 | 2017 |
| On-chip training of recurrent neural networks with limited numerical precision T Na, JH Ko, J Kung, S Mukhopadhyay 2017 International Joint Conference on Neural Networks (IJCNN), 3716-3723, 2017 | 51 | 2017 |
| Speeding up convolutional neural network training with dynamic precision scaling and flexible multiplier-accumulator T Na, S Mukhopadhyay Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 49 | 2016 |
| 14.7 A modular hybrid LDO with fast load-transient response and programmable PSRR in 14nm CMOS featuring dynamic clamp tuning and time-constant compensation X Liu, HK Krishnamurthy, T Na, S Weng, KZ Ahmed, K Ravichandran, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 234-236, 2019 | 45 | 2019 |
| DeepTrain: A programmable embedded platform for training deep neural networks D Kim, T Na, S Yalamanchili, S Mukhopadhyay IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 43 | 2018 |
| A ferroelectric FET based power-efficient architecture for data-intensive computing Y Long, T Na, P Rastogi, K Rao, AI Khan, S Yalamanchili, ... Proceedings of the International Conference on Computer-Aided Design, 1-8, 2018 | 30 | 2018 |
| Delay-locked loop circuit and method of controlling the same TS Na, ID Song US Patent 9,077,350, 2015 | 29 | 2015 |
| Camel: An adaptive camera with embedded machine learning-based sensor parameter control BA Mudassar, P Saha, Y Long, MF Amir, E Gebhardt, T Na, JH Ko, M Wolf, ... IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (3 …, 2019 | 21 | 2019 |
| A single-chip image sensor node with energy harvesting from a CMOS pixel array JH Ko, MF Amir, KZ Ahmed, T Na, S Mukhopadhyay IEEE transactions on circuits and systems I: regular papers 64 (9), 2295-2307, 2017 | 21 | 2017 |
| Mixture of pre-processing experts model for noise robust deep learning on resource constrained platforms T Na, M Lee, BA Mudassar, P Saha, JH Ko, S Mukhopadhyay 2019 International Joint Conference on Neural Networks (IJCNN), 1-7, 2019 | 18 | 2019 |
| Design and analysis of a neural network inference engine based on adaptive weight compression JH Ko, D Kim, T Na, S Mukhopadhyay IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 18 | 2018 |
| A universal modular hybrid LDO with fast load transient response and programmable PSRR in 14-nm CMOS featuring dynamic clamp strength tuning X Liu, HK Krishnamurthy, T Na, S Weng, KZ Ahmed, C Schaef, ... IEEE Journal of Solid-State Circuits 56 (8), 2402-2415, 2021 | 17 | 2021 |
| Duty correcting circuit, delay-locked loop circuit and method of correcting duty TS Na, JB Kim US Patent 8,542,045, 2013 | 14 | 2013 |
Saibal MukhopadhyayProfessor of Electrical Engineering, Georgia Institute of TechnologyПодтвержден адрес электронной почты в домене ece.gatech.edu
