Design exploration methodology for memristor-based spiking neuromorphic architectures with the Xnet event-driven simulator O Bichler, D Roclin, C Gamrat, D Querlioz 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH …, 2013 | 32 | 2013 |
Design study of efficient digital order-based STDP neuron implementations for extracting temporal features D Roclin, O Bichler, C Gamrat, SJ Thorpe, JO Klein The 2013 International Joint Conference on Neural Networks (IJCNN), 1-7, 2013 | 15 | 2013 |
Memristive based device arrays combined with spike based coding can enable efficient implementations of embedded neuromorphic circuits C Gamrat, O Bichler, D Roclin 2015 IEEE International Electron Devices Meeting (IEDM), 4.5. 1-4.5. 7, 2015 | 11 | 2015 |
Sneak paths effects in CBRAM memristive devices arrays for spiking neural networks D Roclin, O Bichler, C Gamrat, JO Klein Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale …, 2014 | 9 | 2014 |
Optimum transistor sizing of mtncl threshold gates for various design constraints D Roclin University of Arkansas, 2010 | 6 | 2010 |
Utilisation des nano-composants électroniques dans les architectures de traitement associées aux imageurs D Roclin Université Paris Sud-Paris XI, 2014 | 1 | 2014 |
Delay-Insensitive Cell Matrix. SC Smith, D Roclin, J Di CDES, 67-73, 2010 | 1 | 2010 |